diff options
Diffstat (limited to 'drivers/pwm/pwm-bcm2835.c')
| -rw-r--r-- | drivers/pwm/pwm-bcm2835.c | 102 |
1 files changed, 41 insertions, 61 deletions
diff --git a/drivers/pwm/pwm-bcm2835.c b/drivers/pwm/pwm-bcm2835.c index 50b8594be31d..532903da521f 100644 --- a/drivers/pwm/pwm-bcm2835.c +++ b/drivers/pwm/pwm-bcm2835.c @@ -24,38 +24,14 @@ #define PERIOD_MIN 0x2 struct bcm2835_pwm { - struct pwm_chip chip; - struct device *dev; void __iomem *base; struct clk *clk; + unsigned long rate; }; static inline struct bcm2835_pwm *to_bcm2835_pwm(struct pwm_chip *chip) { - return container_of(chip, struct bcm2835_pwm, chip); -} - -static int bcm2835_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct bcm2835_pwm *pc = to_bcm2835_pwm(chip); - u32 value; - - value = readl(pc->base + PWM_CONTROL); - value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm)); - value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm)); - writel(value, pc->base + PWM_CONTROL); - - return 0; -} - -static void bcm2835_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct bcm2835_pwm *pc = to_bcm2835_pwm(chip); - u32 value; - - value = readl(pc->base + PWM_CONTROL); - value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm)); - writel(value, pc->base + PWM_CONTROL); + return pwmchip_get_drvdata(chip); } static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, @@ -63,17 +39,11 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, { struct bcm2835_pwm *pc = to_bcm2835_pwm(chip); - unsigned long rate = clk_get_rate(pc->clk); unsigned long long period_cycles; u64 max_period; u32 val; - if (!rate) { - dev_err(pc->dev, "failed to get clock rate\n"); - return -EINVAL; - } - /* * period_cycles must be a 32 bit value, so period * rate / NSEC_PER_SEC * must be <= U32_MAX. As U32_MAX * NSEC_PER_SEC < U64_MAX the @@ -88,13 +58,13 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, * <=> period < ((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate * <=> period <= ceil((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate) - 1 */ - max_period = DIV_ROUND_UP_ULL((u64)U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC / 2, rate) - 1; + max_period = DIV_ROUND_UP_ULL((u64)U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC / 2, pc->rate) - 1; if (state->period > max_period) return -EINVAL; /* set period */ - period_cycles = DIV_ROUND_CLOSEST_ULL(state->period * rate, NSEC_PER_SEC); + period_cycles = DIV_ROUND_CLOSEST_ULL(state->period * pc->rate, NSEC_PER_SEC); /* don't accept a period that is too small */ if (period_cycles < PERIOD_MIN) @@ -103,12 +73,15 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, writel(period_cycles, pc->base + PERIOD(pwm->hwpwm)); /* set duty cycle */ - val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * rate, NSEC_PER_SEC); + val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * pc->rate, NSEC_PER_SEC); writel(val, pc->base + DUTY(pwm->hwpwm)); /* set polarity */ val = readl(pc->base + PWM_CONTROL); + val &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm)); + val |= PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm); + if (state->polarity == PWM_POLARITY_NORMAL) val &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm)); else @@ -126,64 +99,71 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, } static const struct pwm_ops bcm2835_pwm_ops = { - .request = bcm2835_pwm_request, - .free = bcm2835_pwm_free, .apply = bcm2835_pwm_apply, - .owner = THIS_MODULE, }; static int bcm2835_pwm_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct pwm_chip *chip; struct bcm2835_pwm *pc; int ret; - pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); - if (!pc) - return -ENOMEM; - - pc->dev = &pdev->dev; + chip = devm_pwmchip_alloc(dev, 2, sizeof(*pc)); + if (IS_ERR(chip)) + return PTR_ERR(chip); + pc = to_bcm2835_pwm(chip); pc->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pc->base)) return PTR_ERR(pc->base); - pc->clk = devm_clk_get(&pdev->dev, NULL); + pc->clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(pc->clk)) - return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk), + return dev_err_probe(dev, PTR_ERR(pc->clk), "clock not found\n"); - ret = clk_prepare_enable(pc->clk); + ret = devm_clk_rate_exclusive_get(dev, pc->clk); if (ret) - return ret; + return dev_err_probe(dev, ret, + "fail to get exclusive rate\n"); - pc->chip.dev = &pdev->dev; - pc->chip.ops = &bcm2835_pwm_ops; - pc->chip.npwm = 2; + pc->rate = clk_get_rate(pc->clk); + if (!pc->rate) + return dev_err_probe(dev, -EINVAL, + "failed to get clock rate\n"); + + chip->ops = &bcm2835_pwm_ops; + chip->atomic = true; platform_set_drvdata(pdev, pc); - ret = pwmchip_add(&pc->chip); + ret = devm_pwmchip_add(dev, chip); if (ret < 0) - goto add_fail; + return dev_err_probe(dev, ret, "failed to add pwmchip\n"); return 0; - -add_fail: - clk_disable_unprepare(pc->clk); - return ret; } -static int bcm2835_pwm_remove(struct platform_device *pdev) +static int bcm2835_pwm_suspend(struct device *dev) { - struct bcm2835_pwm *pc = platform_get_drvdata(pdev); - - pwmchip_remove(&pc->chip); + struct bcm2835_pwm *pc = dev_get_drvdata(dev); clk_disable_unprepare(pc->clk); return 0; } +static int bcm2835_pwm_resume(struct device *dev) +{ + struct bcm2835_pwm *pc = dev_get_drvdata(dev); + + return clk_prepare_enable(pc->clk); +} + +static DEFINE_SIMPLE_DEV_PM_OPS(bcm2835_pwm_pm_ops, bcm2835_pwm_suspend, + bcm2835_pwm_resume); + static const struct of_device_id bcm2835_pwm_of_match[] = { { .compatible = "brcm,bcm2835-pwm", }, { /* sentinel */ } @@ -194,9 +174,9 @@ static struct platform_driver bcm2835_pwm_driver = { .driver = { .name = "bcm2835-pwm", .of_match_table = bcm2835_pwm_of_match, + .pm = pm_ptr(&bcm2835_pwm_pm_ops), }, .probe = bcm2835_pwm_probe, - .remove = bcm2835_pwm_remove, }; module_platform_driver(bcm2835_pwm_driver); |