diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_nx2.c')
| -rw-r--r-- | drivers/scsi/qla2xxx/qla_nx2.c | 28 |
1 files changed, 8 insertions, 20 deletions
diff --git a/drivers/scsi/qla2xxx/qla_nx2.c b/drivers/scsi/qla2xxx/qla_nx2.c index 50e57603ce3d..41ff6fbdb933 100644 --- a/drivers/scsi/qla2xxx/qla_nx2.c +++ b/drivers/scsi/qla2xxx/qla_nx2.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include <linux/vmalloc.h> @@ -140,7 +139,7 @@ qla8044_poll_wait_for_ready(struct scsi_qla_host *vha, uint32_t addr1, uint32_t mask) { unsigned long timeout; - uint32_t temp; + uint32_t temp = 0; /* jiffies after 100ms */ timeout = jiffies + msecs_to_jiffies(TIMEOUT_100_MS); @@ -660,7 +659,7 @@ static int qla8044_poll_reg(struct scsi_qla_host *vha, uint32_t addr, int duration, uint32_t test_mask, uint32_t test_result) { - uint32_t value; + uint32_t value = 0; int timeout_error; uint8_t retries; int ret_val = QLA_SUCCESS; @@ -1939,8 +1938,7 @@ qla8044_device_state_handler(struct scsi_qla_host *vha) dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX); ql_dbg(ql_dbg_p3p, vha, 0xb0ce, "Device state is 0x%x = %s\n", - dev_state, dev_state < MAX_STATES ? - qdev_state(dev_state) : "Unknown"); + dev_state, qdev_state(dev_state)); /* wait for 30 seconds for device to go ready */ dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); @@ -1953,8 +1951,7 @@ qla8044_device_state_handler(struct scsi_qla_host *vha) ql_log(ql_log_warn, vha, 0xb0cf, "%s: Device Init Failed 0x%x = %s\n", QLA2XXX_DRIVER_NAME, dev_state, - dev_state < MAX_STATES ? - qdev_state(dev_state) : "Unknown"); + qdev_state(dev_state)); qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX, QLA8XXX_DEV_FAILED); @@ -1964,8 +1961,7 @@ qla8044_device_state_handler(struct scsi_qla_host *vha) dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX); ql_log(ql_log_info, vha, 0xb0d0, "Device state is 0x%x = %s\n", - dev_state, dev_state < MAX_STATES ? - qdev_state(dev_state) : "Unknown"); + dev_state, qdev_state(dev_state)); /* NOTE: Make sure idc unlocked upon exit of switch statement */ switch (dev_state) { @@ -2029,7 +2025,7 @@ exit_error: } /** - * qla4_8xxx_check_temp - Check the ISP82XX temperature. + * qla8044_check_temp - Check the ISP82XX temperature. * @vha: adapter block pointer. * * Note: The caller should not hold the idc lock. @@ -2227,19 +2223,16 @@ qla8044_minidump_process_control(struct scsi_qla_host *vha, if (opcode & QLA82XX_DBG_OPCODE_WR) { qla8044_wr_reg_indirect(vha, crb_addr, crb_entry->value_1); - opcode &= ~QLA82XX_DBG_OPCODE_WR; } if (opcode & QLA82XX_DBG_OPCODE_RW) { qla8044_rd_reg_indirect(vha, crb_addr, &read_value); qla8044_wr_reg_indirect(vha, crb_addr, read_value); - opcode &= ~QLA82XX_DBG_OPCODE_RW; } if (opcode & QLA82XX_DBG_OPCODE_AND) { qla8044_rd_reg_indirect(vha, crb_addr, &read_value); read_value &= crb_entry->value_2; - opcode &= ~QLA82XX_DBG_OPCODE_AND; if (opcode & QLA82XX_DBG_OPCODE_OR) { read_value |= crb_entry->value_3; opcode &= ~QLA82XX_DBG_OPCODE_OR; @@ -2250,7 +2243,6 @@ qla8044_minidump_process_control(struct scsi_qla_host *vha, qla8044_rd_reg_indirect(vha, crb_addr, &read_value); read_value |= crb_entry->value_3; qla8044_wr_reg_indirect(vha, crb_addr, read_value); - opcode &= ~QLA82XX_DBG_OPCODE_OR; } if (opcode & QLA82XX_DBG_OPCODE_POLL) { poll_time = crb_entry->crb_strd.poll_timeout; @@ -2270,7 +2262,6 @@ qla8044_minidump_process_control(struct scsi_qla_host *vha, crb_addr, &read_value); } } while (1); - opcode &= ~QLA82XX_DBG_OPCODE_POLL; } if (opcode & QLA82XX_DBG_OPCODE_RDSTATE) { @@ -2284,7 +2275,6 @@ qla8044_minidump_process_control(struct scsi_qla_host *vha, qla8044_rd_reg_indirect(vha, addr, &read_value); index = crb_entry->crb_ctrl.state_index_v; tmplt_hdr->saved_state_array[index] = read_value; - opcode &= ~QLA82XX_DBG_OPCODE_RDSTATE; } if (opcode & QLA82XX_DBG_OPCODE_WRSTATE) { @@ -2304,7 +2294,6 @@ qla8044_minidump_process_control(struct scsi_qla_host *vha, } qla8044_wr_reg_indirect(vha, addr, read_value); - opcode &= ~QLA82XX_DBG_OPCODE_WRSTATE; } if (opcode & QLA82XX_DBG_OPCODE_MDSTATE) { @@ -2317,7 +2306,6 @@ qla8044_minidump_process_control(struct scsi_qla_host *vha, read_value |= crb_entry->value_3; read_value += crb_entry->value_1; tmplt_hdr->saved_state_array[index] = read_value; - opcode &= ~QLA82XX_DBG_OPCODE_MDSTATE; } crb_addr += crb_entry->crb_strd.addr_stride; } @@ -2595,7 +2583,7 @@ qla8044_minidump_process_rdmux(struct scsi_qla_host *vha, struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr) { - uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value; + uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value = 0; struct qla8044_minidump_entry_mux *mux_hdr; uint32_t *data_ptr = *d_ptr; |