1 files changed, 205 insertions, 135 deletions

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 0757985947dd..4b40985af1ea 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -13,12 +13,14 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/gpio/consumer.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/spi-mt65xx.h>
 #include <linux/pm_runtime.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/spi-mem.h>
 #include <linux/dma-mapping.h>
+#include <linux/pm_qos.h>
 
 #define SPI_CFG0_REG			0x0000
 #define SPI_CFG1_REG			0x0004
@@ -135,7 +137,7 @@ struct mtk_spi_compatible {
  * @pad_num:		Number of pad_sel entries
  * @pad_sel:		Groups of pins to select
  * @parent_clk:		Parent of sel_clk
- * @sel_clk:		SPI master mux clock
+ * @sel_clk:		SPI host mux clock
  * @spi_clk:		Peripheral clock
  * @spi_hclk:		AHB bus clock
  * @cur_transfer:	Currently processed SPI transfer
@@ -146,6 +148,7 @@ struct mtk_spi_compatible {
  * @tx_sgl_len:		Size of TX DMA transfer
  * @rx_sgl_len:		Size of RX DMA transfer
  * @dev_comp:		Device data structure
+ * @qos_request:	QoS request
  * @spi_clk_hz:		Current SPI clock in Hz
  * @spimem_done:	SPI-MEM operation completion
  * @use_spimem:		Enables SPI-MEM
@@ -165,6 +168,7 @@ struct mtk_spi {
 	struct scatterlist *tx_sgl, *rx_sgl;
 	u32 tx_sgl_len, rx_sgl_len;
 	const struct mtk_spi_compatible *dev_comp;
+	struct pm_qos_request qos_request;
 	u32 spi_clk_hz;
 	struct completion spimem_done;
 	bool use_spimem;
@@ -216,6 +220,14 @@ static const struct mtk_spi_compatible mt6893_compat = {
 	.no_need_unprepare = true,
 };
 
+static const struct mtk_spi_compatible mt6991_compat = {
+	.need_pad_sel = true,
+	.must_tx = true,
+	.enhance_timing = true,
+	.dma_ext = true,
+	.ipm_design = true,
+};
+
 /*
  * A piece of default chip info unless the platform
  * supplies it.
@@ -241,6 +253,9 @@ static const struct of_device_id mtk_spi_of_match[] = {
 	{ .compatible = "mediatek,mt6765-spi",
 		.data = (void *)&mt6765_compat,
 	},
+	{ .compatible = "mediatek,mt6991-spi",
+		.data = (void *)&mt6991_compat,
+	},
 	{ .compatible = "mediatek,mt7622-spi",
 		.data = (void *)&mt7622_compat,
 	},
@@ -282,7 +297,7 @@ static void mtk_spi_reset(struct mtk_spi *mdata)
 
 static int mtk_spi_set_hw_cs_timing(struct spi_device *spi)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(spi->controller);
 	struct spi_delay *cs_setup = &spi->cs_setup;
 	struct spi_delay *cs_hold = &spi->cs_hold;
 	struct spi_delay *cs_inactive = &spi->cs_inactive;
@@ -347,14 +362,15 @@ static int mtk_spi_set_hw_cs_timing(struct spi_device *spi)
 	return 0;
 }
 
-static int mtk_spi_hw_init(struct spi_master *master,
+static int mtk_spi_hw_init(struct spi_controller *host,
 			   struct spi_device *spi)
 {
 	u16 cpha, cpol;
 	u32 reg_val;
 	struct mtk_chip_config *chip_config = spi->controller_data;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
+	cpu_latency_qos_update_request(&mdata->qos_request, 500);
 	cpha = spi->mode & SPI_CPHA ? 1 : 0;
 	cpol = spi->mode & SPI_CPOL ? 1 : 0;
 
@@ -452,16 +468,25 @@ static int mtk_spi_hw_init(struct spi_master *master,
 	return 0;
 }
 
-static int mtk_spi_prepare_message(struct spi_master *master,
+static int mtk_spi_prepare_message(struct spi_controller *host,
 				   struct spi_message *msg)
 {
-	return mtk_spi_hw_init(master, msg->spi);
+	return mtk_spi_hw_init(host, msg->spi);
+}
+
+static int mtk_spi_unprepare_message(struct spi_controller *host,
+				     struct spi_message *message)
+{
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
+
+	cpu_latency_qos_update_request(&mdata->qos_request, PM_QOS_DEFAULT_VALUE);
+	return 0;
 }
 
 static void mtk_spi_set_cs(struct spi_device *spi, bool enable)
 {
 	u32 reg_val;
-	struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(spi->controller);
 
 	if (spi->mode & SPI_CS_HIGH)
 		enable = !enable;
@@ -478,11 +503,11 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable)
 	}
 }
 
-static void mtk_spi_prepare_transfer(struct spi_master *master,
+static void mtk_spi_prepare_transfer(struct spi_controller *host,
 				     u32 speed_hz)
 {
 	u32 div, sck_time, reg_val;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	if (speed_hz < mdata->spi_clk_hz / 2)
 		div = DIV_ROUND_UP(mdata->spi_clk_hz, speed_hz);
@@ -511,10 +536,10 @@ static void mtk_spi_prepare_transfer(struct spi_master *master,
 	}
 }
 
-static void mtk_spi_setup_packet(struct spi_master *master)
+static void mtk_spi_setup_packet(struct spi_controller *host)
 {
 	u32 packet_size, packet_loop, reg_val;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	if (mdata->dev_comp->ipm_design)
 		packet_size = min_t(u32,
@@ -538,10 +563,26 @@ static void mtk_spi_setup_packet(struct spi_master *master)
 	writel(reg_val, mdata->base + SPI_CFG1_REG);
 }
 
-static void mtk_spi_enable_transfer(struct spi_master *master)
+inline u32 mtk_spi_set_nbit(u32 nbit)
+{
+	switch (nbit) {
+	default:
+		pr_warn_once("unknown nbit mode %u. Falling back to single mode\n",
+			     nbit);
+		fallthrough;
+	case SPI_NBITS_SINGLE:
+		return 0x0;
+	case SPI_NBITS_DUAL:
+		return 0x1;
+	case SPI_NBITS_QUAD:
+		return 0x2;
+	}
+}
+
+static void mtk_spi_enable_transfer(struct spi_controller *host)
 {
 	u32 cmd;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	cmd = readl(mdata->base + SPI_CMD_REG);
 	if (mdata->state == MTK_SPI_IDLE)
@@ -566,10 +607,10 @@ static int mtk_spi_get_mult_delta(struct mtk_spi *mdata, u32 xfer_len)
 	return mult_delta;
 }
 
-static void mtk_spi_update_mdata_len(struct spi_master *master)
+static void mtk_spi_update_mdata_len(struct spi_controller *host)
 {
 	int mult_delta;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	if (mdata->tx_sgl_len && mdata->rx_sgl_len) {
 		if (mdata->tx_sgl_len > mdata->rx_sgl_len) {
@@ -594,10 +635,10 @@ static void mtk_spi_update_mdata_len(struct spi_master *master)
 	}
 }
 
-static void mtk_spi_setup_dma_addr(struct spi_master *master,
+static void mtk_spi_setup_dma_addr(struct spi_controller *host,
 				   struct spi_transfer *xfer)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	if (mdata->tx_sgl) {
 		writel((u32)(xfer->tx_dma & MTK_SPI_32BITS_MASK),
@@ -620,19 +661,19 @@ static void mtk_spi_setup_dma_addr(struct spi_master *master,
 	}
 }
 
-static int mtk_spi_fifo_transfer(struct spi_master *master,
+static int mtk_spi_fifo_transfer(struct spi_controller *host,
 				 struct spi_device *spi,
 				 struct spi_transfer *xfer)
 {
 	int cnt, remainder;
 	u32 reg_val;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	mdata->cur_transfer = xfer;
 	mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, xfer->len);
 	mdata->num_xfered = 0;
-	mtk_spi_prepare_transfer(master, xfer->speed_hz);
-	mtk_spi_setup_packet(master);
+	mtk_spi_prepare_transfer(host, xfer->speed_hz);
+	mtk_spi_setup_packet(host);
 
 	if (xfer->tx_buf) {
 		cnt = xfer->len / 4;
@@ -645,17 +686,17 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
 		}
 	}
 
-	mtk_spi_enable_transfer(master);
+	mtk_spi_enable_transfer(host);
 
 	return 1;
 }
 
-static int mtk_spi_dma_transfer(struct spi_master *master,
+static int mtk_spi_dma_transfer(struct spi_controller *host,
 				struct spi_device *spi,
 				struct spi_transfer *xfer)
 {
 	int cmd;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	mdata->tx_sgl = NULL;
 	mdata->rx_sgl = NULL;
@@ -664,7 +705,7 @@ static int mtk_spi_dma_transfer(struct spi_master *master,
 	mdata->cur_transfer = xfer;
 	mdata->num_xfered = 0;
 
-	mtk_spi_prepare_transfer(master, xfer->speed_hz);
+	mtk_spi_prepare_transfer(host, xfer->speed_hz);
 
 	cmd = readl(mdata->base + SPI_CMD_REG);
 	if (xfer->tx_buf)
@@ -687,38 +728,44 @@ static int mtk_spi_dma_transfer(struct spi_master *master,
 		mdata->rx_sgl_len = sg_dma_len(mdata->rx_sgl);
 	}
 
-	mtk_spi_update_mdata_len(master);
-	mtk_spi_setup_packet(master);
-	mtk_spi_setup_dma_addr(master, xfer);
-	mtk_spi_enable_transfer(master);
+	mtk_spi_update_mdata_len(host);
+	mtk_spi_setup_packet(host);
+	mtk_spi_setup_dma_addr(host, xfer);
+	mtk_spi_enable_transfer(host);
 
 	return 1;
 }
 
-static int mtk_spi_transfer_one(struct spi_master *master,
+static int mtk_spi_transfer_one(struct spi_controller *host,
 				struct spi_device *spi,
 				struct spi_transfer *xfer)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(spi->controller);
 	u32 reg_val = 0;
 
 	/* prepare xfer direction and duplex mode */
 	if (mdata->dev_comp->ipm_design) {
-		if (!xfer->tx_buf || !xfer->rx_buf) {
+		if (xfer->tx_buf && xfer->rx_buf) {
+			reg_val &= ~SPI_CFG3_IPM_HALF_DUPLEX_EN;
+		} else if (xfer->tx_buf) {
+			reg_val |= SPI_CFG3_IPM_HALF_DUPLEX_EN;
+			reg_val &= ~SPI_CFG3_IPM_HALF_DUPLEX_DIR;
+			reg_val |= mtk_spi_set_nbit(xfer->tx_nbits);
+		} else {
 			reg_val |= SPI_CFG3_IPM_HALF_DUPLEX_EN;
-			if (xfer->rx_buf)
-				reg_val |= SPI_CFG3_IPM_HALF_DUPLEX_DIR;
+			reg_val |= SPI_CFG3_IPM_HALF_DUPLEX_DIR;
+			reg_val |= mtk_spi_set_nbit(xfer->rx_nbits);
 		}
 		writel(reg_val, mdata->base + SPI_CFG3_IPM_REG);
 	}
 
-	if (master->can_dma(master, spi, xfer))
-		return mtk_spi_dma_transfer(master, spi, xfer);
+	if (host->can_dma(host, spi, xfer))
+		return mtk_spi_dma_transfer(host, spi, xfer);
 	else
-		return mtk_spi_fifo_transfer(master, spi, xfer);
+		return mtk_spi_fifo_transfer(host, spi, xfer);
 }
 
-static bool mtk_spi_can_dma(struct spi_master *master,
+static bool mtk_spi_can_dma(struct spi_controller *host,
 			    struct spi_device *spi,
 			    struct spi_transfer *xfer)
 {
@@ -730,7 +777,7 @@ static bool mtk_spi_can_dma(struct spi_master *master,
 
 static int mtk_spi_setup(struct spi_device *spi)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(spi->controller);
 
 	if (!spi->controller_data)
 		spi->controller_data = (void *)&mtk_default_chip_info;
@@ -742,85 +789,73 @@ static int mtk_spi_setup(struct spi_device *spi)
 	return 0;
 }
 
-static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
+static irqreturn_t mtk_spi_interrupt_thread(int irq, void *dev_id)
 {
 	u32 cmd, reg_val, cnt, remainder, len;
-	struct spi_master *master = dev_id;
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
-	struct spi_transfer *trans = mdata->cur_transfer;
-
-	reg_val = readl(mdata->base + SPI_STATUS0_REG);
-	if (reg_val & MTK_SPI_PAUSE_INT_STATUS)
-		mdata->state = MTK_SPI_PAUSED;
-	else
-		mdata->state = MTK_SPI_IDLE;
-
-	/* SPI-MEM ops */
-	if (mdata->use_spimem) {
-		complete(&mdata->spimem_done);
-		return IRQ_HANDLED;
-	}
+	struct spi_controller *host = dev_id;
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
+	struct spi_transfer *xfer = mdata->cur_transfer;
 
-	if (!master->can_dma(master, NULL, trans)) {
-		if (trans->rx_buf) {
+	if (!host->can_dma(host, NULL, xfer)) {
+		if (xfer->rx_buf) {
 			cnt = mdata->xfer_len / 4;
 			ioread32_rep(mdata->base + SPI_RX_DATA_REG,
-				     trans->rx_buf + mdata->num_xfered, cnt);
+				     xfer->rx_buf + mdata->num_xfered, cnt);
 			remainder = mdata->xfer_len % 4;
 			if (remainder > 0) {
 				reg_val = readl(mdata->base + SPI_RX_DATA_REG);
-				memcpy(trans->rx_buf +
-					mdata->num_xfered +
-					(cnt * 4),
+				memcpy(xfer->rx_buf + (cnt * 4) + mdata->num_xfered,
 					&reg_val,
 					remainder);
 			}
 		}
 
 		mdata->num_xfered += mdata->xfer_len;
-		if (mdata->num_xfered == trans->len) {
-			spi_finalize_current_transfer(master);
+		if (mdata->num_xfered == xfer->len) {
+			spi_finalize_current_transfer(host);
 			return IRQ_HANDLED;
 		}
 
-		len = trans->len - mdata->num_xfered;
+		len = xfer->len - mdata->num_xfered;
 		mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, len);
-		mtk_spi_setup_packet(master);
+		mtk_spi_setup_packet(host);
 
-		cnt = mdata->xfer_len / 4;
-		iowrite32_rep(mdata->base + SPI_TX_DATA_REG,
-				trans->tx_buf + mdata->num_xfered, cnt);
+		if (xfer->tx_buf) {
+			cnt = mdata->xfer_len / 4;
+			iowrite32_rep(mdata->base + SPI_TX_DATA_REG,
+					xfer->tx_buf + mdata->num_xfered, cnt);
 
-		remainder = mdata->xfer_len % 4;
-		if (remainder > 0) {
-			reg_val = 0;
-			memcpy(&reg_val,
-				trans->tx_buf + (cnt * 4) + mdata->num_xfered,
-				remainder);
-			writel(reg_val, mdata->base + SPI_TX_DATA_REG);
+			remainder = mdata->xfer_len % 4;
+			if (remainder > 0) {
+				reg_val = 0;
+				memcpy(&reg_val,
+					xfer->tx_buf + (cnt * 4) + mdata->num_xfered,
+					remainder);
+				writel(reg_val, mdata->base + SPI_TX_DATA_REG);
+			}
 		}
 
-		mtk_spi_enable_transfer(master);
+		mtk_spi_enable_transfer(host);
 
 		return IRQ_HANDLED;
 	}
 
 	if (mdata->tx_sgl)
-		trans->tx_dma += mdata->xfer_len;
+		xfer->tx_dma += mdata->xfer_len;
 	if (mdata->rx_sgl)
-		trans->rx_dma += mdata->xfer_len;
+		xfer->rx_dma += mdata->xfer_len;
 
 	if (mdata->tx_sgl && (mdata->tx_sgl_len == 0)) {
 		mdata->tx_sgl = sg_next(mdata->tx_sgl);
 		if (mdata->tx_sgl) {
-			trans->tx_dma = sg_dma_address(mdata->tx_sgl);
+			xfer->tx_dma = sg_dma_address(mdata->tx_sgl);
 			mdata->tx_sgl_len = sg_dma_len(mdata->tx_sgl);
 		}
 	}
 	if (mdata->rx_sgl && (mdata->rx_sgl_len == 0)) {
 		mdata->rx_sgl = sg_next(mdata->rx_sgl);
 		if (mdata->rx_sgl) {
-			trans->rx_dma = sg_dma_address(mdata->rx_sgl);
+			xfer->rx_dma = sg_dma_address(mdata->rx_sgl);
 			mdata->rx_sgl_len = sg_dma_len(mdata->rx_sgl);
 		}
 	}
@@ -832,18 +867,39 @@ static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
 		cmd &= ~SPI_CMD_RX_DMA;
 		writel(cmd, mdata->base + SPI_CMD_REG);
 
-		spi_finalize_current_transfer(master);
+		spi_finalize_current_transfer(host);
 		return IRQ_HANDLED;
 	}
 
-	mtk_spi_update_mdata_len(master);
-	mtk_spi_setup_packet(master);
-	mtk_spi_setup_dma_addr(master, trans);
-	mtk_spi_enable_transfer(master);
+	mtk_spi_update_mdata_len(host);
+	mtk_spi_setup_packet(host);
+	mtk_spi_setup_dma_addr(host, xfer);
+	mtk_spi_enable_transfer(host);
 
 	return IRQ_HANDLED;
 }
 
+static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
+{
+	struct spi_controller *host = dev_id;
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
+	u32 reg_val;
+
+	reg_val = readl(mdata->base + SPI_STATUS0_REG);
+	if (reg_val & MTK_SPI_PAUSE_INT_STATUS)
+		mdata->state = MTK_SPI_PAUSED;
+	else
+		mdata->state = MTK_SPI_IDLE;
+
+	/* SPI-MEM ops */
+	if (mdata->use_spimem) {
+		complete(&mdata->spimem_done);
+		return IRQ_HANDLED;
+	}
+
+	return IRQ_WAKE_THREAD;
+}
+
 static int mtk_spi_mem_adjust_op_size(struct spi_mem *mem,
 				      struct spi_mem_op *op)
 {
@@ -884,10 +940,10 @@ static bool mtk_spi_mem_supports_op(struct spi_mem *mem,
 	return true;
 }
 
-static void mtk_spi_mem_setup_dma_xfer(struct spi_master *master,
+static void mtk_spi_mem_setup_dma_xfer(struct spi_controller *host,
 				       const struct spi_mem_op *op)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	writel((u32)(mdata->tx_dma & MTK_SPI_32BITS_MASK),
 	       mdata->base + SPI_TX_SRC_REG);
@@ -911,7 +967,7 @@ static void mtk_spi_mem_setup_dma_xfer(struct spi_master *master,
 static int mtk_spi_transfer_wait(struct spi_mem *mem,
 				 const struct spi_mem_op *op)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(mem->spi->master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(mem->spi->controller);
 	/*
 	 * For each byte we wait for 8 cycles of the SPI clock.
 	 * Since speed is defined in Hz and we want milliseconds,
@@ -941,7 +997,7 @@ static int mtk_spi_transfer_wait(struct spi_mem *mem,
 static int mtk_spi_mem_exec_op(struct spi_mem *mem,
 			       const struct spi_mem_op *op)
 {
-	struct mtk_spi *mdata = spi_master_get_devdata(mem->spi->master);
+	struct mtk_spi *mdata = spi_controller_get_devdata(mem->spi->controller);
 	u32 reg_val, nio, tx_size;
 	char *tx_tmp_buf, *rx_tmp_buf;
 	int ret = 0;
@@ -950,8 +1006,8 @@ static int mtk_spi_mem_exec_op(struct spi_mem *mem,
 	reinit_completion(&mdata->spimem_done);
 
 	mtk_spi_reset(mdata);
-	mtk_spi_hw_init(mem->spi->master, mem->spi);
-	mtk_spi_prepare_transfer(mem->spi->master, mem->spi->max_speed_hz);
+	mtk_spi_hw_init(mem->spi->controller, mem->spi);
+	mtk_spi_prepare_transfer(mem->spi->controller, op->max_freq);
 
 	reg_val = readl(mdata->base + SPI_CFG3_IPM_REG);
 	/* opcode byte len */
@@ -971,7 +1027,7 @@ static int mtk_spi_mem_exec_op(struct spi_mem *mem,
 	} else {
 		reg_val &= ~SPI_CFG3_IPM_NODATA_FLAG;
 		mdata->xfer_len = op->data.nbytes;
-		mtk_spi_setup_packet(mem->spi->master);
+		mtk_spi_setup_packet(mem->spi->controller);
 	}
 
 	if (op->addr.nbytes || op->dummy.nbytes) {
@@ -1069,9 +1125,9 @@ static int mtk_spi_mem_exec_op(struct spi_mem *mem,
 		reg_val |= SPI_CMD_RX_DMA;
 	writel(reg_val, mdata->base + SPI_CMD_REG);
 
-	mtk_spi_mem_setup_dma_xfer(mem->spi->master, op);
+	mtk_spi_mem_setup_dma_xfer(mem->spi->controller, op);
 
-	mtk_spi_enable_transfer(mem->spi->master);
+	mtk_spi_enable_transfer(mem->spi->controller);
 
 	/* Wait for the interrupt. */
 	ret = mtk_spi_transfer_wait(mem, op);
@@ -1112,44 +1168,50 @@ static const struct spi_controller_mem_ops mtk_spi_mem_ops = {
 	.exec_op = mtk_spi_mem_exec_op,
 };
 
+static const struct spi_controller_mem_caps mtk_spi_mem_caps = {
+	.per_op_freq = true,
+};
+
 static int mtk_spi_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct spi_master *master;
+	struct spi_controller *host;
 	struct mtk_spi *mdata;
 	int i, irq, ret, addr_bits;
 
-	master = devm_spi_alloc_master(dev, sizeof(*mdata));
-	if (!master)
-		return dev_err_probe(dev, -ENOMEM, "failed to alloc spi master\n");
+	host = devm_spi_alloc_host(dev, sizeof(*mdata));
+	if (!host)
+		return -ENOMEM;
 
-	master->auto_runtime_pm = true;
-	master->dev.of_node = dev->of_node;
-	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
+	host->auto_runtime_pm = true;
+	host->dev.of_node = dev->of_node;
+	host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
 
-	master->set_cs = mtk_spi_set_cs;
-	master->prepare_message = mtk_spi_prepare_message;
-	master->transfer_one = mtk_spi_transfer_one;
-	master->can_dma = mtk_spi_can_dma;
-	master->setup = mtk_spi_setup;
-	master->set_cs_timing = mtk_spi_set_hw_cs_timing;
-	master->use_gpio_descriptors = true;
+	host->set_cs = mtk_spi_set_cs;
+	host->prepare_message = mtk_spi_prepare_message;
+	host->unprepare_message = mtk_spi_unprepare_message;
+	host->transfer_one = mtk_spi_transfer_one;
+	host->can_dma = mtk_spi_can_dma;
+	host->setup = mtk_spi_setup;
+	host->set_cs_timing = mtk_spi_set_hw_cs_timing;
+	host->use_gpio_descriptors = true;
 
-	mdata = spi_master_get_devdata(master);
+	mdata = spi_controller_get_devdata(host);
 	mdata->dev_comp = device_get_match_data(dev);
 
 	if (mdata->dev_comp->enhance_timing)
-		master->mode_bits |= SPI_CS_HIGH;
+		host->mode_bits |= SPI_CS_HIGH;
 
 	if (mdata->dev_comp->must_tx)
-		master->flags = SPI_CONTROLLER_MUST_TX;
+		host->flags = SPI_CONTROLLER_MUST_TX;
 	if (mdata->dev_comp->ipm_design)
-		master->mode_bits |= SPI_LOOP | SPI_RX_DUAL | SPI_TX_DUAL |
-				     SPI_RX_QUAD | SPI_TX_QUAD;
+		host->mode_bits |= SPI_LOOP | SPI_RX_DUAL | SPI_TX_DUAL |
+				   SPI_RX_QUAD | SPI_TX_QUAD;
 
 	if (mdata->dev_comp->ipm_design) {
 		mdata->dev = dev;
-		master->mem_ops = &mtk_spi_mem_ops;
+		host->mem_ops = &mtk_spi_mem_ops;
+		host->mem_caps = &mtk_spi_mem_caps;
 		init_completion(&mdata->spimem_done);
 	}
 
@@ -1176,7 +1238,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
 		}
 	}
 
-	platform_set_drvdata(pdev, master);
+	platform_set_drvdata(pdev, host);
 	mdata->base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(mdata->base))
 		return PTR_ERR(mdata->base);
@@ -1234,13 +1296,15 @@ static int mtk_spi_probe(struct platform_device *pdev)
 		clk_disable_unprepare(mdata->spi_hclk);
 	}
 
+	cpu_latency_qos_add_request(&mdata->qos_request, PM_QOS_DEFAULT_VALUE);
+
 	if (mdata->dev_comp->need_pad_sel) {
-		if (mdata->pad_num != master->num_chipselect)
+		if (mdata->pad_num != host->num_chipselect)
 			return dev_err_probe(dev, -EINVAL,
 				"pad_num does not match num_chipselect(%d != %d)\n",
-				mdata->pad_num, master->num_chipselect);
+				mdata->pad_num, host->num_chipselect);
 
-		if (!master->cs_gpiods && master->num_chipselect > 1)
+		if (!host->cs_gpiods && host->num_chipselect > 1)
 			return dev_err_probe(dev, -EINVAL,
 				"cs_gpios not specified and num_chipselect > 1\n");
 	}
@@ -1254,17 +1318,18 @@ static int mtk_spi_probe(struct platform_device *pdev)
 		dev_notice(dev, "SPI dma_set_mask(%d) failed, ret:%d\n",
 			   addr_bits, ret);
 
-	ret = devm_request_irq(dev, irq, mtk_spi_interrupt,
-			       IRQF_TRIGGER_NONE, dev_name(dev), master);
+	ret = devm_request_threaded_irq(dev, irq, mtk_spi_interrupt,
+					mtk_spi_interrupt_thread,
+					IRQF_TRIGGER_NONE, dev_name(dev), host);
 	if (ret)
 		return dev_err_probe(dev, ret, "failed to register irq\n");
 
 	pm_runtime_enable(dev);
 
-	ret = devm_spi_register_master(dev, master);
+	ret = devm_spi_register_controller(dev, host);
 	if (ret) {
 		pm_runtime_disable(dev);
-		return dev_err_probe(dev, ret, "failed to register master\n");
+		return dev_err_probe(dev, ret, "failed to register host\n");
 	}
 
 	return 0;
@@ -1272,10 +1337,11 @@ static int mtk_spi_probe(struct platform_device *pdev)
 
 static void mtk_spi_remove(struct platform_device *pdev)
 {
-	struct spi_master *master = platform_get_drvdata(pdev);
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct spi_controller *host = platform_get_drvdata(pdev);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 	int ret;
 
+	cpu_latency_qos_remove_request(&mdata->qos_request);
 	if (mdata->use_spimem && !completion_done(&mdata->spimem_done))
 		complete(&mdata->spimem_done);
 
@@ -1304,10 +1370,10 @@ static void mtk_spi_remove(struct platform_device *pdev)
 static int mtk_spi_suspend(struct device *dev)
 {
 	int ret;
-	struct spi_master *master = dev_get_drvdata(dev);
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct spi_controller *host = dev_get_drvdata(dev);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
-	ret = spi_master_suspend(master);
+	ret = spi_controller_suspend(host);
 	if (ret)
 		return ret;
 
@@ -1316,14 +1382,18 @@ static int mtk_spi_suspend(struct device *dev)
 		clk_disable_unprepare(mdata->spi_hclk);
 	}
 
+	pinctrl_pm_select_sleep_state(dev);
+
 	return 0;
 }
 
 static int mtk_spi_resume(struct device *dev)
 {
 	int ret;
-	struct spi_master *master = dev_get_drvdata(dev);
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct spi_controller *host = dev_get_drvdata(dev);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
+
+	pinctrl_pm_select_default_state(dev);
 
 	if (!pm_runtime_suspended(dev)) {
 		ret = clk_prepare_enable(mdata->spi_clk);
@@ -1340,7 +1410,7 @@ static int mtk_spi_resume(struct device *dev)
 		}
 	}
 
-	ret = spi_master_resume(master);
+	ret = spi_controller_resume(host);
 	if (ret < 0) {
 		clk_disable_unprepare(mdata->spi_clk);
 		clk_disable_unprepare(mdata->spi_hclk);
@@ -1353,8 +1423,8 @@ static int mtk_spi_resume(struct device *dev)
 #ifdef CONFIG_PM
 static int mtk_spi_runtime_suspend(struct device *dev)
 {
-	struct spi_master *master = dev_get_drvdata(dev);
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct spi_controller *host = dev_get_drvdata(dev);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 
 	if (mdata->dev_comp->no_need_unprepare) {
 		clk_disable(mdata->spi_clk);
@@ -1369,8 +1439,8 @@ static int mtk_spi_runtime_suspend(struct device *dev)
 
 static int mtk_spi_runtime_resume(struct device *dev)
 {
-	struct spi_master *master = dev_get_drvdata(dev);
-	struct mtk_spi *mdata = spi_master_get_devdata(master);
+	struct spi_controller *host = dev_get_drvdata(dev);
+	struct mtk_spi *mdata = spi_controller_get_devdata(host);
 	int ret;
 
 	if (mdata->dev_comp->no_need_unprepare) {
@@ -1417,7 +1487,7 @@ static struct platform_driver mtk_spi_driver = {
 		.of_match_table = mtk_spi_of_match,
 	},
 	.probe = mtk_spi_probe,
-	.remove_new = mtk_spi_remove,
+	.remove = mtk_spi_remove,
 };
 
 module_platform_driver(mtk_spi_driver);