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path: root/drivers/spi/spi-omap-uwire.c
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Diffstat (limited to 'drivers/spi/spi-omap-uwire.c')
-rw-r--r--drivers/spi/spi-omap-uwire.c146
1 files changed, 49 insertions, 97 deletions
diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c
index a6a8f0961750..b9a91dbfeaef 100644
--- a/drivers/spi/spi-omap-uwire.c
+++ b/drivers/spi/spi-omap-uwire.c
@@ -28,34 +28,26 @@
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
-#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/module.h>
+#include <linux/io.h>
-#include <asm/irq.h>
-#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
-
-#include <mach/mux.h>
-
-#include <mach/omap7xx.h> /* OMAP7XX_IO_CONF registers */
-
+#include <linux/soc/ti/omap1-io.h>
+#include <linux/soc/ti/omap1-soc.h>
+#include <linux/soc/ti/omap1-mux.h>
/* FIXME address is now a platform device resource,
* and irqs should show there too...
@@ -99,7 +91,6 @@ struct uwire_spi {
};
struct uwire_state {
- unsigned bits_per_word;
unsigned div1_idx;
};
@@ -108,7 +99,7 @@ struct uwire_state {
* Or, put it in a structure which is used throughout the driver;
* that avoids having to issue two loads for each bit of static data.
*/
-static unsigned int uwire_idx_shift;
+static unsigned int uwire_idx_shift = 2;
static void __iomem *uwire_base;
static inline void uwire_write_reg(int idx, u16 val)
@@ -188,7 +179,7 @@ static void uwire_chipselect(struct spi_device *spi, int value)
w = uwire_read_reg(UWIRE_CSR);
old_cs = (w >> 10) & 0x03;
- if (value == BITBANG_CS_INACTIVE || old_cs != spi->chip_select) {
+ if (value == BITBANG_CS_INACTIVE || old_cs != spi_get_chipselect(spi, 0)) {
/* Deselect this CS, or the previous CS */
w &= ~CS_CMD;
uwire_write_reg(UWIRE_CSR, w);
@@ -202,7 +193,7 @@ static void uwire_chipselect(struct spi_device *spi, int value)
else
uwire_write_reg(UWIRE_SR4, 0);
- w = spi->chip_select << 10;
+ w = spi_get_chipselect(spi, 0) << 10;
w |= CS_CMD;
uwire_write_reg(UWIRE_CSR, w);
}
@@ -210,9 +201,8 @@ static void uwire_chipselect(struct spi_device *spi, int value)
static int uwire_txrx(struct spi_device *spi, struct spi_transfer *t)
{
- struct uwire_state *ust = spi->controller_state;
unsigned len = t->len;
- unsigned bits = ust->bits_per_word;
+ unsigned bits = t->bits_per_word;
unsigned bytes;
u16 val, w;
int status = 0;
@@ -220,11 +210,7 @@ static int uwire_txrx(struct spi_device *spi, struct spi_transfer *t)
if (!t->tx_buf && !t->rx_buf)
return 0;
- /* Microwire doesn't read and write concurrently */
- if (t->tx_buf && t->rx_buf)
- return -EPERM;
-
- w = spi->chip_select << 10;
+ w = spi_get_chipselect(spi, 0) << 10;
w |= CS_CMD;
if (t->tx_buf) {
@@ -322,7 +308,6 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
struct uwire_state *ust = spi->controller_state;
struct uwire_spi *uwire;
unsigned flags = 0;
- unsigned bits;
unsigned hz;
unsigned long rate;
int div1_idx;
@@ -330,24 +315,7 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
int div2;
int status;
- uwire = spi_master_get_devdata(spi->master);
-
- if (spi->chip_select > 3) {
- pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select);
- status = -ENODEV;
- goto done;
- }
-
- bits = spi->bits_per_word;
- if (t != NULL && t->bits_per_word)
- bits = t->bits_per_word;
-
- if (bits > 16) {
- pr_debug("%s: wordsize %d?\n", dev_name(&spi->dev), bits);
- status = -ENODEV;
- goto done;
- }
- ust->bits_per_word = bits;
+ uwire = spi_controller_get_devdata(spi->controller);
/* mode 0..3, clock inverted separately;
* standard nCS signaling;
@@ -359,7 +327,7 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
if (spi->mode & SPI_CPOL)
flags |= UWIRE_CLK_INVERTED;
- switch (spi->mode & (SPI_CPOL | SPI_CPHA)) {
+ switch (spi->mode & SPI_MODE_X_MASK) {
case SPI_MODE_0:
case SPI_MODE_3:
flags |= UWIRE_WRITE_FALLING_EDGE | UWIRE_READ_RISING_EDGE;
@@ -373,9 +341,10 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
/* assume it's already enabled */
rate = clk_get_rate(uwire->ck);
- hz = spi->max_speed_hz;
- if (t != NULL && t->speed_hz)
+ if (t != NULL)
hz = t->speed_hz;
+ else
+ hz = spi->max_speed_hz;
if (!hz) {
pr_debug("%s: zero speed?\n", dev_name(&spi->dev));
@@ -439,7 +408,7 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
rate /= 8;
break;
}
- omap_uwire_configure_mode(spi->chip_select, flags);
+ omap_uwire_configure_mode(spi_get_chipselect(spi, 0), flags);
pr_debug("%s: uwire flags %02x, armxor %lu KHz, SCK %lu KHz\n",
__func__, flags,
clk_get_rate(uwire->ck) / 1000,
@@ -452,15 +421,22 @@ done:
static int uwire_setup(struct spi_device *spi)
{
struct uwire_state *ust = spi->controller_state;
+ bool initial_setup = false;
+ int status;
if (ust == NULL) {
ust = kzalloc(sizeof(*ust), GFP_KERNEL);
if (ust == NULL)
return -ENOMEM;
spi->controller_state = ust;
+ initial_setup = true;
}
- return uwire_setup_transfer(spi, NULL);
+ status = uwire_setup_transfer(spi, NULL);
+ if (status && initial_setup)
+ kfree(ust);
+
+ return status;
}
static void uwire_cleanup(struct spi_device *spi)
@@ -471,59 +447,53 @@ static void uwire_cleanup(struct spi_device *spi)
static void uwire_off(struct uwire_spi *uwire)
{
uwire_write_reg(UWIRE_SR3, 0);
- clk_disable(uwire->ck);
- clk_put(uwire->ck);
- spi_master_put(uwire->bitbang.master);
+ clk_disable_unprepare(uwire->ck);
+ spi_controller_put(uwire->bitbang.ctlr);
}
static int uwire_probe(struct platform_device *pdev)
{
- struct spi_master *master;
+ struct spi_controller *host;
struct uwire_spi *uwire;
int status;
- master = spi_alloc_master(&pdev->dev, sizeof *uwire);
- if (!master)
+ host = spi_alloc_host(&pdev->dev, sizeof(*uwire));
+ if (!host)
return -ENODEV;
- uwire = spi_master_get_devdata(master);
+ uwire = spi_controller_get_devdata(host);
- uwire_base = ioremap(UWIRE_BASE_PHYS, UWIRE_IO_SIZE);
+ uwire_base = devm_ioremap(&pdev->dev, UWIRE_BASE_PHYS, UWIRE_IO_SIZE);
if (!uwire_base) {
dev_dbg(&pdev->dev, "can't ioremap UWIRE\n");
- spi_master_put(master);
+ spi_controller_put(host);
return -ENOMEM;
}
platform_set_drvdata(pdev, uwire);
- uwire->ck = clk_get(&pdev->dev, "fck");
+ uwire->ck = devm_clk_get(&pdev->dev, "fck");
if (IS_ERR(uwire->ck)) {
status = PTR_ERR(uwire->ck);
dev_dbg(&pdev->dev, "no functional clock?\n");
- spi_master_put(master);
+ spi_controller_put(host);
return status;
}
- clk_enable(uwire->ck);
-
- if (cpu_is_omap7xx())
- uwire_idx_shift = 1;
- else
- uwire_idx_shift = 2;
+ clk_prepare_enable(uwire->ck);
uwire_write_reg(UWIRE_SR3, 1);
/* the spi->mode bits understood by this driver: */
- master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
-
- master->flags = SPI_MASTER_HALF_DUPLEX;
+ host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+ host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
+ host->flags = SPI_CONTROLLER_HALF_DUPLEX;
- master->bus_num = 2; /* "official" */
- master->num_chipselect = 4;
- master->setup = uwire_setup;
- master->cleanup = uwire_cleanup;
+ host->bus_num = 2; /* "official" */
+ host->num_chipselect = 4;
+ host->setup = uwire_setup;
+ host->cleanup = uwire_cleanup;
- uwire->bitbang.master = master;
+ uwire->bitbang.ctlr = host;
uwire->bitbang.chipselect = uwire_chipselect;
uwire->bitbang.setup_transfer = uwire_setup_transfer;
uwire->bitbang.txrx_bufs = uwire_txrx;
@@ -531,22 +501,18 @@ static int uwire_probe(struct platform_device *pdev)
status = spi_bitbang_start(&uwire->bitbang);
if (status < 0) {
uwire_off(uwire);
- iounmap(uwire_base);
}
return status;
}
-static int uwire_remove(struct platform_device *pdev)
+static void uwire_remove(struct platform_device *pdev)
{
struct uwire_spi *uwire = platform_get_drvdata(pdev);
- int status;
// FIXME remove all child devices, somewhere ...
- status = spi_bitbang_stop(&uwire->bitbang);
+ spi_bitbang_stop(&uwire->bitbang);
uwire_off(uwire);
- iounmap(uwire_base);
- return status;
}
/* work with hotplug and coldplug */
@@ -555,31 +521,16 @@ MODULE_ALIAS("platform:omap_uwire");
static struct platform_driver uwire_driver = {
.driver = {
.name = "omap_uwire",
- .owner = THIS_MODULE,
},
- .remove = uwire_remove,
+ .probe = uwire_probe,
+ .remove = uwire_remove,
// suspend ... unuse ck
// resume ... use ck
};
static int __init omap_uwire_init(void)
{
- /* FIXME move these into the relevant board init code. also, include
- * H3 support; it uses tsc2101 like H2 (on a different chipselect).
- */
-
- if (machine_is_omap_h2()) {
- /* defaults: W21 SDO, U18 SDI, V19 SCL */
- omap_cfg_reg(N14_1610_UWIRE_CS0);
- omap_cfg_reg(N15_1610_UWIRE_CS1);
- }
- if (machine_is_omap_perseus2()) {
- /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */
- int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000;
- omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9);
- }
-
- return platform_driver_probe(&uwire_driver, uwire_probe);
+ return platform_driver_register(&uwire_driver);
}
static void __exit omap_uwire_exit(void)
@@ -590,5 +541,6 @@ static void __exit omap_uwire_exit(void)
subsys_initcall(omap_uwire_init);
module_exit(omap_uwire_exit);
+MODULE_DESCRIPTION("MicroWire interface driver for OMAP");
MODULE_LICENSE("GPL");
generated by cgit (git 2.34.1) at 2025-12-25 07:03:01 +0000