diff options
Diffstat (limited to 'drivers/spi/spi-pxa2xx.h')
| -rw-r--r-- | drivers/spi/spi-pxa2xx.h | 110 |
1 files changed, 54 insertions, 56 deletions
diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 1400472bc986..447be0369384 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -1,28 +1,46 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs - * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2013, 2021 Intel Corporation */ #ifndef SPI_PXA2XX_H #define SPI_PXA2XX_H -#include <linux/atomic.h> #include <linux/dmaengine.h> -#include <linux/errno.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/pxa2xx_ssp.h> -#include <linux/scatterlist.h> +#include <linux/irqreturn.h> +#include <linux/types.h> #include <linux/sizes.h> -#include <linux/spi/spi.h> -#include <linux/spi/pxa2xx_spi.h> -struct driver_data { - /* Driver model hookup */ - struct platform_device *pdev; +#include <linux/pxa2xx_ssp.h> + +struct device; +struct gpio_desc; + +/* + * The platform data for SSP controller devices + * (resides in device.platform_data). + */ +struct pxa2xx_spi_controller { + u8 num_chipselect; + u8 enable_dma; + u8 dma_burst_size; + bool is_target; + /* DMA engine specific config */ + dma_filter_fn dma_filter; + void *tx_param; + void *rx_param; + + /* For non-PXA arches */ + struct ssp_device ssp; +}; + +struct spi_controller; +struct spi_device; +struct spi_transfer; + +struct driver_data { /* SSP Info */ struct ssp_device *ssp; @@ -33,10 +51,6 @@ struct driver_data { /* PXA hookup */ struct pxa2xx_spi_controller *controller_info; - /* SSP register addresses */ - void __iomem *ioaddr; - phys_addr_t ssdr_physical; - /* SSP masks*/ u32 dma_cr1; u32 int_cr1; @@ -55,53 +69,26 @@ struct driver_data { int (*write)(struct driver_data *drv_data); int (*read)(struct driver_data *drv_data); irqreturn_t (*transfer_handler)(struct driver_data *drv_data); - void (*cs_control)(u32 command); void __iomem *lpss_base; - /* GPIOs for chip selects */ - struct gpio_desc **cs_gpiods; - /* Optional slave FIFO ready signal */ struct gpio_desc *gpiod_ready; }; -struct chip_data { - u32 cr1; - u32 dds_rate; - u32 timeout; - u8 n_bytes; - u32 dma_burst_size; - u32 threshold; - u32 dma_threshold; - u16 lpss_rx_threshold; - u16 lpss_tx_threshold; - u8 enable_dma; - union { - struct gpio_desc *gpiod_cs; - unsigned int frm; - }; - int gpio_cs_inverted; - int (*write)(struct driver_data *drv_data); - int (*read)(struct driver_data *drv_data); - void (*cs_control)(u32 command); -}; - -static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, - unsigned reg) +static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg) { - return __raw_readl(drv_data->ioaddr + reg); + return pxa_ssp_read_reg(drv_data->ssp, reg); } -static inline void pxa2xx_spi_write(const struct driver_data *drv_data, - unsigned reg, u32 val) +static inline void pxa2xx_spi_write(const struct driver_data *drv_data, u32 reg, u32 val) { - __raw_writel(val, drv_data->ioaddr + reg); + pxa_ssp_write_reg(drv_data->ssp, reg, val); } #define DMA_ALIGNMENT 8 -static inline int pxa25x_ssp_comp(struct driver_data *drv_data) +static inline int pxa25x_ssp_comp(const struct driver_data *drv_data) { switch (drv_data->ssp_type) { case PXA25x_SSP: @@ -113,11 +100,21 @@ static inline int pxa25x_ssp_comp(struct driver_data *drv_data) } } -static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val) +static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits) +{ + pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits); +} + +static inline u32 read_SSSR_bits(const struct driver_data *drv_data, u32 bits) +{ + return pxa2xx_spi_read(drv_data, SSSR) & bits; +} + +static inline void write_SSSR_CS(const struct driver_data *drv_data, u32 val) { if (drv_data->ssp_type == CE4100_SSP || drv_data->ssp_type == QUARK_X1000_SSP) - val |= pxa2xx_spi_read(drv_data, SSSR) & SSSR_ALT_FRM_MASK; + val |= read_SSSR_bits(drv_data, SSSR_ALT_FRM_MASK); pxa2xx_spi_write(drv_data, SSSR, val); } @@ -134,10 +131,11 @@ extern void pxa2xx_spi_dma_start(struct driver_data *drv_data); extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data); extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data); extern void pxa2xx_spi_dma_release(struct driver_data *drv_data); -extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip, - struct spi_device *spi, - u8 bits_per_word, - u32 *burst_code, - u32 *threshold); + +int pxa2xx_spi_probe(struct device *dev, struct ssp_device *ssp, + struct pxa2xx_spi_controller *platform_info); +void pxa2xx_spi_remove(struct device *dev); + +extern const struct dev_pm_ops pxa2xx_spi_pm_ops; #endif /* SPI_PXA2XX_H */ |