diff options
Diffstat (limited to 'drivers/usb/musb/sunxi.c')
| -rw-r--r-- | drivers/usb/musb/sunxi.c | 170 |
1 files changed, 96 insertions, 74 deletions
diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c index c9a09b5bb6e5..a6bd3e968cc7 100644 --- a/drivers/usb/musb/sunxi.c +++ b/drivers/usb/musb/sunxi.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Allwinner sun4i MUSB Glue Layer * @@ -5,16 +6,6 @@ * * Based on code from * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include <linux/clk.h> @@ -76,6 +67,13 @@ #define SUNXI_MUSB_FL_NO_CONFIGDATA 7 #define SUNXI_MUSB_FL_PHY_MODE_PEND 8 +struct sunxi_musb_cfg { + const struct musb_hdrc_config *hdrc_config; + bool has_sram; + bool has_reset; + bool no_configdata; +}; + /* Our read/write methods need access and do not get passed in a musb ref :| */ static struct musb *sunxi_musb; @@ -114,13 +112,11 @@ static void sunxi_musb_work(struct work_struct *work) devctl = readb(musb->mregs + SUNXI_MUSB_DEVCTL); if (test_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags)) { set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); - musb->xceiv->otg->default_a = 1; musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; MUSB_HST_MODE(musb); devctl |= MUSB_DEVCTL_SESSION; } else { clear_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); - musb->xceiv->otg->default_a = 0; musb->xceiv->otg->state = OTG_STATE_B_IDLE; MUSB_DEV_MODE(musb); devctl &= ~MUSB_DEVCTL_SESSION; @@ -354,7 +350,7 @@ static int sunxi_musb_set_mode(struct musb *musb, u8 mode) if (glue->phy_mode == new_mode) return 0; - if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE) { + if (musb->port_mode != MUSB_OTG) { dev_err(musb->controller->parent, "Error changing modes is only supported in dual role mode\n"); return -EINVAL; @@ -416,7 +412,7 @@ static u32 sunxi_musb_busctl_offset(u8 epnum, u16 offset) return SUNXI_MUSB_TXFUNCADDR + offset; } -static u8 sunxi_musb_readb(const void __iomem *addr, unsigned offset) +static u8 sunxi_musb_readb(void __iomem *addr, u32 offset) { struct sunxi_glue *glue; @@ -449,6 +445,10 @@ static u8 sunxi_musb_readb(const void __iomem *addr, unsigned offset) return 0xde; return readb(addr + SUNXI_MUSB_CONFIGDATA); + case MUSB_ULPI_BUSCONTROL: + dev_warn(sunxi_musb->controller->parent, + "sunxi-musb does not have ULPI bus control register\n"); + return 0; /* Offset for these is fixed by sunxi_musb_busctl_offset() */ case SUNXI_MUSB_TXFUNCADDR: case SUNXI_MUSB_TXHUBADDR: @@ -503,6 +503,10 @@ static void sunxi_musb_writeb(void __iomem *addr, unsigned offset, u8 data) return writeb(data, addr + SUNXI_MUSB_TXFIFOSZ); case MUSB_RXFIFOSZ: return writeb(data, addr + SUNXI_MUSB_RXFIFOSZ); + case MUSB_ULPI_BUSCONTROL: + dev_warn(sunxi_musb->controller->parent, + "sunxi-musb does not have ULPI bus control register\n"); + return; /* Offset for these is fixed by sunxi_musb_busctl_offset() */ case SUNXI_MUSB_TXFUNCADDR: case SUNXI_MUSB_TXHUBADDR: @@ -529,7 +533,7 @@ static void sunxi_musb_writeb(void __iomem *addr, unsigned offset, u8 data) (int)(addr - sunxi_musb->mregs)); } -static u16 sunxi_musb_readw(const void __iomem *addr, unsigned offset) +static u16 sunxi_musb_readw(void __iomem *addr, u32 offset) { if (addr == sunxi_musb->mregs) { /* generic control or fifo control reg access */ @@ -622,11 +626,10 @@ static const struct musb_platform_ops sunxi_musb_ops = { .post_root_reset_end = sunxi_musb_post_root_reset_end, }; -/* Allwinner OTG supports up to 5 endpoints */ -#define SUNXI_MUSB_MAX_EP_NUM 6 #define SUNXI_MUSB_RAM_BITS 11 -static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = { +/* Allwinner OTG supports up to 5 endpoints */ +static const struct musb_fifo_cfg sunxi_musb_mode_cfg_5eps[] = { MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512), MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512), MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512), @@ -640,9 +643,7 @@ static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = { }; /* H3/V3s OTG supports only 4 endpoints */ -#define SUNXI_MUSB_MAX_EP_NUM_H3 5 - -static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = { +static const struct musb_fifo_cfg sunxi_musb_mode_cfg_4eps[] = { MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512), MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512), MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512), @@ -653,35 +654,33 @@ static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = { MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512), }; -static const struct musb_hdrc_config sunxi_musb_hdrc_config = { - .fifo_cfg = sunxi_musb_mode_cfg, - .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg), +static const struct musb_hdrc_config sunxi_musb_hdrc_config_5eps = { + .fifo_cfg = sunxi_musb_mode_cfg_5eps, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_5eps), .multipoint = true, .dyn_fifo = true, - .soft_con = true, - .num_eps = SUNXI_MUSB_MAX_EP_NUM, + /* Two FIFOs per endpoint, plus ep_0. */ + .num_eps = (ARRAY_SIZE(sunxi_musb_mode_cfg_5eps) / 2) + 1, .ram_bits = SUNXI_MUSB_RAM_BITS, - .dma = 0, }; -static struct musb_hdrc_config sunxi_musb_hdrc_config_h3 = { - .fifo_cfg = sunxi_musb_mode_cfg_h3, - .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3), +static const struct musb_hdrc_config sunxi_musb_hdrc_config_4eps = { + .fifo_cfg = sunxi_musb_mode_cfg_4eps, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_4eps), .multipoint = true, .dyn_fifo = true, - .soft_con = true, - .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3, + /* Two FIFOs per endpoint, plus ep_0. */ + .num_eps = (ARRAY_SIZE(sunxi_musb_mode_cfg_4eps) / 2) + 1, .ram_bits = SUNXI_MUSB_RAM_BITS, - .dma = 0, }; - static int sunxi_musb_probe(struct platform_device *pdev) { struct musb_hdrc_platform_data pdata; struct platform_device_info pinfo; struct sunxi_glue *glue; struct device_node *np = pdev->dev.of_node; + const struct sunxi_musb_cfg *cfg; int ret; if (!np) { @@ -697,19 +696,19 @@ static int sunxi_musb_probe(struct platform_device *pdev) switch (usb_get_dr_mode(&pdev->dev)) { #if defined CONFIG_USB_MUSB_DUAL_ROLE || defined CONFIG_USB_MUSB_HOST case USB_DR_MODE_HOST: - pdata.mode = MUSB_PORT_MODE_HOST; + pdata.mode = MUSB_HOST; glue->phy_mode = PHY_MODE_USB_HOST; break; #endif #if defined CONFIG_USB_MUSB_DUAL_ROLE || defined CONFIG_USB_MUSB_GADGET case USB_DR_MODE_PERIPHERAL: - pdata.mode = MUSB_PORT_MODE_GADGET; + pdata.mode = MUSB_PERIPHERAL; glue->phy_mode = PHY_MODE_USB_DEVICE; break; #endif #ifdef CONFIG_USB_MUSB_DUAL_ROLE case USB_DR_MODE_OTG: - pdata.mode = MUSB_PORT_MODE_DUAL_ROLE; + pdata.mode = MUSB_OTG; glue->phy_mode = PHY_MODE_USB_OTG; break; #endif @@ -718,26 +717,25 @@ static int sunxi_musb_probe(struct platform_device *pdev) return -EINVAL; } pdata.platform_ops = &sunxi_musb_ops; - if (!of_device_is_compatible(np, "allwinner,sun8i-h3-musb")) - pdata.config = &sunxi_musb_hdrc_config; - else - pdata.config = &sunxi_musb_hdrc_config_h3; + + cfg = of_device_get_match_data(&pdev->dev); + if (!cfg) + return -EINVAL; + + pdata.config = cfg->hdrc_config; glue->dev = &pdev->dev; INIT_WORK(&glue->work, sunxi_musb_work); glue->host_nb.notifier_call = sunxi_musb_host_notifier; - if (of_device_is_compatible(np, "allwinner,sun4i-a10-musb")) + if (cfg->has_sram) set_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags); - if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb")) + if (cfg->has_reset) set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags); - if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb") || - of_device_is_compatible(np, "allwinner,sun8i-h3-musb")) { - set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags); + if (cfg->no_configdata) set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags); - } glue->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(glue->clk)) { @@ -748,31 +746,20 @@ static int sunxi_musb_probe(struct platform_device *pdev) if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) { glue->rst = devm_reset_control_get(&pdev->dev, NULL); - if (IS_ERR(glue->rst)) { - if (PTR_ERR(glue->rst) == -EPROBE_DEFER) - return -EPROBE_DEFER; - dev_err(&pdev->dev, "Error getting reset %ld\n", - PTR_ERR(glue->rst)); - return PTR_ERR(glue->rst); - } + if (IS_ERR(glue->rst)) + return dev_err_probe(&pdev->dev, PTR_ERR(glue->rst), + "Error getting reset\n"); } glue->extcon = extcon_get_edev_by_phandle(&pdev->dev, 0); - if (IS_ERR(glue->extcon)) { - if (PTR_ERR(glue->extcon) == -EPROBE_DEFER) - return -EPROBE_DEFER; - dev_err(&pdev->dev, "Invalid or missing extcon\n"); - return PTR_ERR(glue->extcon); - } + if (IS_ERR(glue->extcon)) + return dev_err_probe(&pdev->dev, PTR_ERR(glue->extcon), + "Invalid or missing extcon\n"); glue->phy = devm_phy_get(&pdev->dev, "usb"); - if (IS_ERR(glue->phy)) { - if (PTR_ERR(glue->phy) == -EPROBE_DEFER) - return -EPROBE_DEFER; - dev_err(&pdev->dev, "Error getting phy %ld\n", - PTR_ERR(glue->phy)); - return PTR_ERR(glue->phy); - } + if (IS_ERR(glue->phy)) + return dev_err_probe(&pdev->dev, PTR_ERR(glue->phy), + "Error getting phy\n"); glue->usb_phy = usb_phy_generic_register(); if (IS_ERR(glue->usb_phy)) { @@ -794,6 +781,8 @@ static int sunxi_musb_probe(struct platform_device *pdev) pinfo.name = "musb-hdrc"; pinfo.id = PLATFORM_DEVID_AUTO; pinfo.parent = &pdev->dev; + pinfo.fwnode = of_fwnode_handle(pdev->dev.of_node); + pinfo.of_node_reused = true; pinfo.res = pdev->resource; pinfo.num_res = pdev->num_resources; pinfo.data = &pdata; @@ -813,22 +802,55 @@ err_unregister_usb_phy: return ret; } -static int sunxi_musb_remove(struct platform_device *pdev) +static void sunxi_musb_remove(struct platform_device *pdev) { struct sunxi_glue *glue = platform_get_drvdata(pdev); struct platform_device *usb_phy = glue->usb_phy; platform_device_unregister(glue->musb_pdev); usb_phy_generic_unregister(usb_phy); - - return 0; } +static const struct sunxi_musb_cfg sun4i_a10_musb_cfg = { + .hdrc_config = &sunxi_musb_hdrc_config_5eps, + .has_sram = true, +}; + +static const struct sunxi_musb_cfg sun6i_a31_musb_cfg = { + .hdrc_config = &sunxi_musb_hdrc_config_5eps, + .has_reset = true, +}; + +static const struct sunxi_musb_cfg sun8i_a33_musb_cfg = { + .hdrc_config = &sunxi_musb_hdrc_config_5eps, + .has_reset = true, + .no_configdata = true, +}; + +static const struct sunxi_musb_cfg sun8i_h3_musb_cfg = { + .hdrc_config = &sunxi_musb_hdrc_config_4eps, + .has_reset = true, + .no_configdata = true, +}; + +static const struct sunxi_musb_cfg suniv_f1c100s_musb_cfg = { + .hdrc_config = &sunxi_musb_hdrc_config_5eps, + .has_sram = true, + .has_reset = true, + .no_configdata = true, +}; + static const struct of_device_id sunxi_musb_match[] = { - { .compatible = "allwinner,sun4i-a10-musb", }, - { .compatible = "allwinner,sun6i-a31-musb", }, - { .compatible = "allwinner,sun8i-a33-musb", }, - { .compatible = "allwinner,sun8i-h3-musb", }, + { .compatible = "allwinner,sun4i-a10-musb", + .data = &sun4i_a10_musb_cfg, }, + { .compatible = "allwinner,sun6i-a31-musb", + .data = &sun6i_a31_musb_cfg, }, + { .compatible = "allwinner,sun8i-a33-musb", + .data = &sun8i_a33_musb_cfg, }, + { .compatible = "allwinner,sun8i-h3-musb", + .data = &sun8i_h3_musb_cfg, }, + { .compatible = "allwinner,suniv-f1c100s-musb", + .data = &suniv_f1c100s_musb_cfg, }, {} }; MODULE_DEVICE_TABLE(of, sunxi_musb_match); |
