diff options
Diffstat (limited to 'drivers/video/fbdev/kyro/STG4000InitDevice.c')
| -rw-r--r-- | drivers/video/fbdev/kyro/STG4000InitDevice.c | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/drivers/video/fbdev/kyro/STG4000InitDevice.c b/drivers/video/fbdev/kyro/STG4000InitDevice.c index 1d3f2080aa6f..79886a246638 100644 --- a/drivers/video/fbdev/kyro/STG4000InitDevice.c +++ b/drivers/video/fbdev/kyro/STG4000InitDevice.c @@ -83,11 +83,11 @@ volatile u32 i,count=0; \ static u32 InitSDRAMRegisters(volatile STG4000REG __iomem *pSTGReg, u32 dwSubSysID, u32 dwRevID) { - u32 adwSDRAMArgCfg0[] = { 0xa0, 0x80, 0xa0, 0xa0, 0xa0 }; - u32 adwSDRAMCfg1[] = { 0x8732, 0x8732, 0xa732, 0xa732, 0x8732 }; - u32 adwSDRAMCfg2[] = { 0x87d2, 0x87d2, 0xa7d2, 0x87d2, 0xa7d2 }; - u32 adwSDRAMRsh[] = { 36, 39, 40 }; - u32 adwChipSpeed[] = { 110, 120, 125 }; + static const u8 adwSDRAMArgCfg0[] = { 0xa0, 0x80, 0xa0, 0xa0, 0xa0 }; + static const u16 adwSDRAMCfg1[] = { 0x8732, 0x8732, 0xa732, 0xa732, 0x8732 }; + static const u16 adwSDRAMCfg2[] = { 0x87d2, 0x87d2, 0xa7d2, 0x87d2, 0xa7d2 }; + static const u8 adwSDRAMRsh[] = { 36, 39, 40 }; + static const u8 adwChipSpeed[] = { 110, 120, 125 }; u32 dwMemTypeIdx; u32 dwChipSpeedIdx; @@ -120,11 +120,11 @@ u32 ProgramClock(u32 refClock, { u32 R = 0, F = 0, OD = 0, ODIndex = 0; u32 ulBestR = 0, ulBestF = 0, ulBestOD = 0; - u32 ulBestVCO = 0, ulBestClk = 0, ulBestScore = 0; + u32 ulBestClk = 0, ulBestScore = 0; u32 ulScore, ulPhaseScore, ulVcoScore; u32 ulTmp = 0, ulVCO; u32 ulScaleClockReq, ulMinClock, ulMaxClock; - u32 ODValues[] = { 1, 2, 0 }; + static const unsigned char ODValues[] = { 1, 2, 0 }; /* Translate clock in Hz */ coreClock *= 100; /* in Hz */ @@ -189,7 +189,6 @@ u32 ProgramClock(u32 refClock, ulScore = ulPhaseScore + ulVcoScore; if (!ulBestScore) { - ulBestVCO = ulVCO; ulBestOD = OD; ulBestF = F; ulBestR = R; @@ -206,7 +205,6 @@ u32 ProgramClock(u32 refClock, but we shall keep this code in case new restrictions come into play --------------------------------------------------------------------------*/ if ((ulScore >= ulBestScore) && (OD > 0)) { - ulBestVCO = ulVCO; ulBestOD = OD; ulBestF = F; ulBestR = R; @@ -244,7 +242,6 @@ int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev) { u32 F, R, P; u16 core_pll = 0, sub; - u32 ulCoreClock; u32 tmp; u32 ulChipSpeed; @@ -282,7 +279,7 @@ int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev) if (ulChipSpeed == 0) return -EINVAL; - ulCoreClock = ProgramClock(REF_FREQ, CORE_PLL_FREQ, &F, &R, &P); + ProgramClock(REF_FREQ, CORE_PLL_FREQ, &F, &R, &P); core_pll |= ((P) | ((F - 2) << 2) | ((R - 2) << 11)); |