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-rw-r--r--sound/soc/codecs/cs43130.h165
1 files changed, 80 insertions, 85 deletions
diff --git a/sound/soc/codecs/cs43130.h b/sound/soc/codecs/cs43130.h
index c3c6eef61e87..dbdb5b262f1b 100644
--- a/sound/soc/codecs/cs43130.h
+++ b/sound/soc/codecs/cs43130.h
@@ -1,24 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ALSA SoC CS43130 codec driver
*
* Copyright 2017 Cirrus Logic, Inc.
*
* Author: Li Xu <li.xu@cirrus.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
*/
#ifndef __CS43130_H__
#define __CS43130_H__
+#include <linux/math.h>
+
/* CS43130 registers addresses */
/* all reg address is shifted by a byte for control byte to be LSB */
#define CS43130_FIRSTREG 0x010000
@@ -381,97 +374,96 @@ enum cs43130_dai_id {
};
struct cs43130_clk_gen {
- unsigned int mclk_int;
- int fs;
- u16 den;
- u16 num;
+ unsigned int mclk_int;
+ int fs;
+ struct u16_fract v;
};
/* frm_size = 16 */
static const struct cs43130_clk_gen cs43130_16_clk_gen[] = {
- {22579200, 32000, 441, 10,},
- {22579200, 44100, 32, 1,},
- {22579200, 48000, 147, 5,},
- {22579200, 88200, 16, 1,},
- {22579200, 96000, 147, 10,},
- {22579200, 176400, 8, 1,},
- {22579200, 192000, 147, 20,},
- {22579200, 352800, 4, 1,},
- {22579200, 384000, 147, 40,},
- {24576000, 32000, 48, 1,},
- {24576000, 44100, 5120, 147,},
- {24576000, 48000, 32, 1,},
- {24576000, 88200, 2560, 147,},
- {24576000, 96000, 16, 1,},
- {24576000, 176400, 1280, 147,},
- {24576000, 192000, 8, 1,},
- {24576000, 352800, 640, 147,},
- {24576000, 384000, 4, 1,},
+ { 22579200, 32000, .v = { 10, 441, }, },
+ { 22579200, 44100, .v = { 1, 32, }, },
+ { 22579200, 48000, .v = { 5, 147, }, },
+ { 22579200, 88200, .v = { 1, 16, }, },
+ { 22579200, 96000, .v = { 10, 147, }, },
+ { 22579200, 176400, .v = { 1, 8, }, },
+ { 22579200, 192000, .v = { 20, 147, }, },
+ { 22579200, 352800, .v = { 1, 4, }, },
+ { 22579200, 384000, .v = { 40, 147, }, },
+ { 24576000, 32000, .v = { 1, 48, }, },
+ { 24576000, 44100, .v = { 147, 5120, }, },
+ { 24576000, 48000, .v = { 1, 32, }, },
+ { 24576000, 88200, .v = { 147, 2560, }, },
+ { 24576000, 96000, .v = { 1, 16, }, },
+ { 24576000, 176400, .v = { 147, 1280, }, },
+ { 24576000, 192000, .v = { 1, 8, }, },
+ { 24576000, 352800, .v = { 147, 640, }, },
+ { 24576000, 384000, .v = { 1, 4, }, },
};
/* frm_size = 32 */
static const struct cs43130_clk_gen cs43130_32_clk_gen[] = {
- {22579200, 32000, 441, 20,},
- {22579200, 44100, 16, 1,},
- {22579200, 48000, 147, 10,},
- {22579200, 88200, 8, 1,},
- {22579200, 96000, 147, 20,},
- {22579200, 176400, 4, 1,},
- {22579200, 192000, 147, 40,},
- {22579200, 352800, 2, 1,},
- {22579200, 384000, 147, 80,},
- {24576000, 32000, 24, 1,},
- {24576000, 44100, 2560, 147,},
- {24576000, 48000, 16, 1,},
- {24576000, 88200, 1280, 147,},
- {24576000, 96000, 8, 1,},
- {24576000, 176400, 640, 147,},
- {24576000, 192000, 4, 1,},
- {24576000, 352800, 320, 147,},
- {24576000, 384000, 2, 1,},
+ { 22579200, 32000, .v = { 20, 441, }, },
+ { 22579200, 44100, .v = { 1, 16, }, },
+ { 22579200, 48000, .v = { 10, 147, }, },
+ { 22579200, 88200, .v = { 1, 8, }, },
+ { 22579200, 96000, .v = { 20, 147, }, },
+ { 22579200, 176400, .v = { 1, 4, }, },
+ { 22579200, 192000, .v = { 40, 147, }, },
+ { 22579200, 352800, .v = { 1, 2, }, },
+ { 22579200, 384000, .v = { 80, 147, }, },
+ { 24576000, 32000, .v = { 1, 24, }, },
+ { 24576000, 44100, .v = { 147, 2560, }, },
+ { 24576000, 48000, .v = { 1, 16, }, },
+ { 24576000, 88200, .v = { 147, 1280, }, },
+ { 24576000, 96000, .v = { 1, 8, }, },
+ { 24576000, 176400, .v = { 147, 640, }, },
+ { 24576000, 192000, .v = { 1, 4, }, },
+ { 24576000, 352800, .v = { 147, 320, }, },
+ { 24576000, 384000, .v = { 1, 2, }, },
};
/* frm_size = 48 */
static const struct cs43130_clk_gen cs43130_48_clk_gen[] = {
- {22579200, 32000, 147, 100,},
- {22579200, 44100, 32, 3,},
- {22579200, 48000, 49, 5,},
- {22579200, 88200, 16, 3,},
- {22579200, 96000, 49, 10,},
- {22579200, 176400, 8, 3,},
- {22579200, 192000, 49, 20,},
- {22579200, 352800, 4, 3,},
- {22579200, 384000, 49, 40,},
- {24576000, 32000, 16, 1,},
- {24576000, 44100, 5120, 441,},
- {24576000, 48000, 32, 3,},
- {24576000, 88200, 2560, 441,},
- {24576000, 96000, 16, 3,},
- {24576000, 176400, 1280, 441,},
- {24576000, 192000, 8, 3,},
- {24576000, 352800, 640, 441,},
- {24576000, 384000, 4, 3,},
+ { 22579200, 32000, .v = { 100, 147, }, },
+ { 22579200, 44100, .v = { 3, 32, }, },
+ { 22579200, 48000, .v = { 5, 49, }, },
+ { 22579200, 88200, .v = { 3, 16, }, },
+ { 22579200, 96000, .v = { 10, 49, }, },
+ { 22579200, 176400, .v = { 3, 8, }, },
+ { 22579200, 192000, .v = { 20, 49, }, },
+ { 22579200, 352800, .v = { 3, 4, }, },
+ { 22579200, 384000, .v = { 40, 49, }, },
+ { 24576000, 32000, .v = { 1, 16, }, },
+ { 24576000, 44100, .v = { 441, 5120, }, },
+ { 24576000, 48000, .v = { 3, 32, }, },
+ { 24576000, 88200, .v = { 441, 2560, }, },
+ { 24576000, 96000, .v = { 3, 16, }, },
+ { 24576000, 176400, .v = { 441, 1280, }, },
+ { 24576000, 192000, .v = { 3, 8, }, },
+ { 24576000, 352800, .v = { 441, 640, }, },
+ { 24576000, 384000, .v = { 3, 4, }, },
};
/* frm_size = 64 */
static const struct cs43130_clk_gen cs43130_64_clk_gen[] = {
- {22579200, 32000, 441, 40,},
- {22579200, 44100, 8, 1,},
- {22579200, 48000, 147, 20,},
- {22579200, 88200, 4, 1,},
- {22579200, 96000, 147, 40,},
- {22579200, 176400, 2, 1,},
- {22579200, 192000, 147, 80,},
- {22579200, 352800, 1, 1,},
- {24576000, 32000, 12, 1,},
- {24576000, 44100, 1280, 147,},
- {24576000, 48000, 8, 1,},
- {24576000, 88200, 640, 147,},
- {24576000, 96000, 4, 1,},
- {24576000, 176400, 320, 147,},
- {24576000, 192000, 2, 1,},
- {24576000, 352800, 160, 147,},
- {24576000, 384000, 1, 1,},
+ { 22579200, 32000, .v = { 40, 441, }, },
+ { 22579200, 44100, .v = { 1, 8, }, },
+ { 22579200, 48000, .v = { 20, 147, }, },
+ { 22579200, 88200, .v = { 1, 4, }, },
+ { 22579200, 96000, .v = { 40, 147, }, },
+ { 22579200, 176400, .v = { 1, 2, }, },
+ { 22579200, 192000, .v = { 80, 147, }, },
+ { 22579200, 352800, .v = { 1, 1, }, },
+ { 24576000, 32000, .v = { 1, 12, }, },
+ { 24576000, 44100, .v = { 147, 1280, }, },
+ { 24576000, 48000, .v = { 1, 8, }, },
+ { 24576000, 88200, .v = { 147, 640, }, },
+ { 24576000, 96000, .v = { 1, 4, }, },
+ { 24576000, 176400, .v = { 147, 320, }, },
+ { 24576000, 192000, .v = { 1, 2, }, },
+ { 24576000, 352800, .v = { 147, 160, }, },
+ { 24576000, 384000, .v = { 1, 1, }, },
};
struct cs43130_bitwidth_map {
@@ -505,15 +497,18 @@ struct cs43130_dai {
unsigned int sclk;
unsigned int dai_format;
unsigned int dai_mode;
+ unsigned int dai_invert;
};
struct cs43130_private {
+ struct device *dev;
struct snd_soc_component *component;
struct regmap *regmap;
struct regulator_bulk_data supplies[CS43130_NUM_SUPPLIES];
struct gpio_desc *reset_gpio;
unsigned int dev_id; /* codec device ID */
int xtal_ibias;
+ bool has_irq_line;
/* shared by both DAIs */
struct mutex clk_mutex;
generated by cgit (git 2.34.1) at 2025-12-25 03:19:28 +0000