summaryrefslogtreecommitdiff
path: root/sound/soc/mediatek
diff options
context:
space:
mode:
Diffstat (limited to 'sound/soc/mediatek')
-rw-r--r--sound/soc/mediatek/Kconfig1
-rw-r--r--sound/soc/mediatek/common/mtk-afe-fe-dai.c20
-rw-r--r--sound/soc/mediatek/common/mtk-afe-fe-dai.h2
-rw-r--r--sound/soc/mediatek/common/mtk-soc-card.h1
-rw-r--r--sound/soc/mediatek/common/mtk-soundcard-driver.c23
-rw-r--r--sound/soc/mediatek/mt2701/mt2701-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt2701/mt2701-cs42448.c8
-rw-r--r--sound/soc/mediatek/mt2701/mt2701-wm8960.c2
-rw-r--r--sound/soc/mediatek/mt6797/mt6797-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt7986/mt7986-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt7986/mt7986-dai-etdm.c4
-rw-r--r--sound/soc/mediatek/mt7986/mt7986-wm8960.c2
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-max98090.c2
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c2
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c4
-rw-r--r--sound/soc/mediatek/mt8173/mt8173-rt5650.c2
-rw-r--r--sound/soc/mediatek/mt8183/mt8183-afe-pcm.c577
-rw-r--r--sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c2
-rw-r--r--sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c4
-rw-r--r--sound/soc/mediatek/mt8186/mt8186-afe-clk.c55
-rw-r--r--sound/soc/mediatek/mt8186/mt8186-afe-clk.h2
-rw-r--r--sound/soc/mediatek/mt8186/mt8186-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt8186/mt8186-mt6366.c2
-rw-r--r--sound/soc/mediatek/mt8188/Makefile1
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-afe-clk.c8
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-afe-clk.h8
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-afe-common.h1
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-afe-pcm.c34
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-audsys-clk.c4
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h4
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-dai-dmic.c683
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-mt6359.c63
-rw-r--r--sound/soc/mediatek/mt8188/mt8188-reg.h17
-rw-r--r--sound/soc/mediatek/mt8192/mt8192-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c2
-rw-r--r--sound/soc/mediatek/mt8195/mt8195-afe-pcm.c6
-rw-r--r--sound/soc/mediatek/mt8195/mt8195-mt6359.c57
-rw-r--r--sound/soc/mediatek/mt8365/mt8365-afe-clk.c3
-rw-r--r--sound/soc/mediatek/mt8365/mt8365-afe-pcm.c19
-rw-r--r--sound/soc/mediatek/mt8365/mt8365-dai-i2s.c15
-rw-r--r--sound/soc/mediatek/mt8365/mt8365-dai-pcm.c4
-rw-r--r--sound/soc/mediatek/mt8365/mt8365-mt6357.c2
43 files changed, 1065 insertions, 617 deletions
diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig
index 3033e2d3fe16..90e367586493 100644
--- a/sound/soc/mediatek/Kconfig
+++ b/sound/soc/mediatek/Kconfig
@@ -228,6 +228,7 @@ config SND_SOC_MT8188
config SND_SOC_MT8188_MT6359
tristate "ASoC Audio driver for MT8188 with MT6359 and I2S codecs"
depends on SND_SOC_MT8188 && MTK_PMIC_WRAP
+ depends on SND_SOC_MT6359_ACCDET || !SND_SOC_MT6359_ACCDET
depends on I2C
select SND_SOC_MT6359
select SND_SOC_HDMI_CODEC
diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.c b/sound/soc/mediatek/common/mtk-afe-fe-dai.c
index 3044d9ab3d4d..3809068f5620 100644
--- a/sound/soc/mediatek/common/mtk-afe-fe-dai.c
+++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.c
@@ -500,26 +500,6 @@ static int mtk_memif_set_rate_fs(struct mtk_base_afe *afe,
return 0;
}
-int mtk_memif_set_rate(struct mtk_base_afe *afe,
- int id, unsigned int rate)
-{
- int fs = 0;
-
- if (!afe->get_dai_fs) {
- dev_err(afe->dev, "%s(), error, afe->get_dai_fs == NULL\n",
- __func__);
- return -EINVAL;
- }
-
- fs = afe->get_dai_fs(afe, id, rate);
-
- if (fs < 0)
- return -EINVAL;
-
- return mtk_memif_set_rate_fs(afe, id, fs);
-}
-EXPORT_SYMBOL_GPL(mtk_memif_set_rate);
-
int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream,
int id, unsigned int rate)
{
diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.h b/sound/soc/mediatek/common/mtk-afe-fe-dai.h
index 8cec90671827..b6d0f2b27e86 100644
--- a/sound/soc/mediatek/common/mtk-afe-fe-dai.h
+++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.h
@@ -42,8 +42,6 @@ int mtk_memif_set_addr(struct mtk_base_afe *afe, int id,
size_t dma_bytes);
int mtk_memif_set_channel(struct mtk_base_afe *afe,
int id, unsigned int channel);
-int mtk_memif_set_rate(struct mtk_base_afe *afe,
- int id, unsigned int rate);
int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream,
int id, unsigned int rate);
int mtk_memif_set_format(struct mtk_base_afe *afe,
diff --git a/sound/soc/mediatek/common/mtk-soc-card.h b/sound/soc/mediatek/common/mtk-soc-card.h
index 3f6e24dd22df..a1d2794ac1f7 100644
--- a/sound/soc/mediatek/common/mtk-soc-card.h
+++ b/sound/soc/mediatek/common/mtk-soc-card.h
@@ -16,6 +16,7 @@ struct mtk_soc_card_data {
const struct mtk_sof_priv *sof_priv;
struct list_head sof_dai_link_list;
struct mtk_platform_card_data *card_data;
+ struct snd_soc_component *accdet;
void *mach_priv;
};
diff --git a/sound/soc/mediatek/common/mtk-soundcard-driver.c b/sound/soc/mediatek/common/mtk-soundcard-driver.c
index f4314dddc460..95a083939f3e 100644
--- a/sound/soc/mediatek/common/mtk-soundcard-driver.c
+++ b/sound/soc/mediatek/common/mtk-soundcard-driver.c
@@ -8,6 +8,7 @@
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_platform.h>
#include <sound/soc.h>
#include "mtk-dsp-sof-common.h"
@@ -192,7 +193,9 @@ EXPORT_SYMBOL_GPL(mtk_soundcard_common_capture_ops);
int mtk_soundcard_common_probe(struct platform_device *pdev)
{
- struct device_node *platform_node, *adsp_node;
+ struct device_node *platform_node, *adsp_node, *accdet_node;
+ struct snd_soc_component *accdet_comp;
+ struct platform_device *accdet_pdev;
const struct mtk_soundcard_pdata *pdata;
struct mtk_soc_card_data *soc_card_data;
struct snd_soc_dai_link *orig_dai_link, *dai_link;
@@ -250,6 +253,24 @@ int mtk_soundcard_common_probe(struct platform_device *pdev)
soc_card_data->card_data->jacks = jacks;
+ accdet_node = of_parse_phandle(pdev->dev.of_node, "mediatek,accdet", 0);
+ if (accdet_node) {
+ accdet_pdev = of_find_device_by_node(accdet_node);
+ if (accdet_pdev) {
+ accdet_comp = snd_soc_lookup_component(&accdet_pdev->dev, NULL);
+ if (accdet_comp)
+ soc_card_data->accdet = accdet_comp;
+ else
+ dev_err(&pdev->dev, "No sound component found from mediatek,accdet property\n");
+
+ put_device(&accdet_pdev->dev);
+ } else {
+ dev_err(&pdev->dev, "No device found from mediatek,accdet property\n");
+ }
+
+ of_node_put(accdet_node);
+ }
+
platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0);
if (!platform_node)
return dev_err_probe(&pdev->dev, -EINVAL,
diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
index 5f11bc5438bd..fcae38135d93 100644
--- a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
+++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
@@ -1462,15 +1462,15 @@ static const struct of_device_id mt2701_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt2701_afe_pcm_dt_match);
static const struct dev_pm_ops mt2701_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt2701_afe_runtime_suspend,
- mt2701_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt2701_afe_runtime_suspend,
+ mt2701_afe_runtime_resume, NULL)
};
static struct platform_driver mt2701_afe_pcm_driver = {
.driver = {
.name = "mt2701-audio",
.of_match_table = mt2701_afe_pcm_dt_match,
- .pm = &mt2701_afe_pm_ops,
+ .pm = pm_ptr(&mt2701_afe_pm_ops),
},
.probe = mt2701_afe_pcm_dev_probe,
.remove = mt2701_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt2701/mt2701-cs42448.c b/sound/soc/mediatek/mt2701/mt2701-cs42448.c
index 00a79867235d..778a9dccfcaa 100644
--- a/sound/soc/mediatek/mt2701/mt2701-cs42448.c
+++ b/sound/soc/mediatek/mt2701/mt2701-cs42448.c
@@ -266,7 +266,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
[DAI_LINK_BE_I2S0] = {
.name = "mt2701-cs42448-I2S0",
.no_pcm = 1,
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC
| SND_SOC_DAIFMT_GATED,
.ops = &mt2701_cs42448_be_ops,
SND_SOC_DAILINK_REG(be_i2s0),
@@ -274,7 +274,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
[DAI_LINK_BE_I2S1] = {
.name = "mt2701-cs42448-I2S1",
.no_pcm = 1,
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC
| SND_SOC_DAIFMT_GATED,
.ops = &mt2701_cs42448_be_ops,
SND_SOC_DAILINK_REG(be_i2s1),
@@ -282,7 +282,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
[DAI_LINK_BE_I2S2] = {
.name = "mt2701-cs42448-I2S2",
.no_pcm = 1,
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC
| SND_SOC_DAIFMT_GATED,
.ops = &mt2701_cs42448_be_ops,
SND_SOC_DAILINK_REG(be_i2s2),
@@ -290,7 +290,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
[DAI_LINK_BE_I2S3] = {
.name = "mt2701-cs42448-I2S3",
.no_pcm = 1,
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC
| SND_SOC_DAIFMT_GATED,
.ops = &mt2701_cs42448_be_ops,
SND_SOC_DAILINK_REG(be_i2s3),
diff --git a/sound/soc/mediatek/mt2701/mt2701-wm8960.c b/sound/soc/mediatek/mt2701/mt2701-wm8960.c
index 2814f0570928..84b3d6cd77a5 100644
--- a/sound/soc/mediatek/mt2701/mt2701-wm8960.c
+++ b/sound/soc/mediatek/mt2701/mt2701-wm8960.c
@@ -83,7 +83,7 @@ static struct snd_soc_dai_link mt2701_wm8960_dai_links[] = {
{
.name = "wm8960-codec",
.no_pcm = 1,
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC
| SND_SOC_DAIFMT_GATED,
.ops = &mt2701_wm8960_be_ops,
SND_SOC_DAILINK_REG(codec),
diff --git a/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c b/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c
index 9159b42adf6a..f62a32f2f2b6 100644
--- a/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c
+++ b/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c
@@ -879,15 +879,15 @@ static const struct of_device_id mt6797_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt6797_afe_pcm_dt_match);
static const struct dev_pm_ops mt6797_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt6797_afe_runtime_suspend,
- mt6797_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt6797_afe_runtime_suspend,
+ mt6797_afe_runtime_resume, NULL)
};
static struct platform_driver mt6797_afe_pcm_driver = {
.driver = {
.name = "mt6797-audio",
.of_match_table = mt6797_afe_pcm_dt_match,
- .pm = &mt6797_afe_pm_ops,
+ .pm = pm_ptr(&mt6797_afe_pm_ops),
},
.probe = mt6797_afe_pcm_dev_probe,
.remove = mt6797_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c b/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c
index 7db090414d59..7a6ad9116e55 100644
--- a/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c
+++ b/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c
@@ -589,15 +589,15 @@ static const struct of_device_id mt7986_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt7986_afe_pcm_dt_match);
static const struct dev_pm_ops mt7986_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt7986_afe_runtime_suspend,
- mt7986_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt7986_afe_runtime_suspend,
+ mt7986_afe_runtime_resume, NULL)
};
static struct platform_driver mt7986_afe_pcm_driver = {
.driver = {
.name = "mt7986-audio",
.of_match_table = mt7986_afe_pcm_dt_match,
- .pm = &mt7986_afe_pm_ops,
+ .pm = pm_ptr(&mt7986_afe_pm_ops),
},
.probe = mt7986_afe_pcm_dev_probe,
.remove = mt7986_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c b/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c
index d57971413a04..fc55ff47b7bc 100644
--- a/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c
+++ b/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c
@@ -348,10 +348,10 @@ static int mtk_dai_etdm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
}
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
+ case SND_SOC_DAIFMT_CBP_CFP:
etdm_data->slave_mode = true;
break;
- case SND_SOC_DAIFMT_CBS_CFS:
+ case SND_SOC_DAIFMT_CBC_CFC:
etdm_data->slave_mode = false;
break;
default:
diff --git a/sound/soc/mediatek/mt7986/mt7986-wm8960.c b/sound/soc/mediatek/mt7986/mt7986-wm8960.c
index c3d1e2eeb0e5..f1dc18222be7 100644
--- a/sound/soc/mediatek/mt7986/mt7986-wm8960.c
+++ b/sound/soc/mediatek/mt7986/mt7986-wm8960.c
@@ -63,7 +63,7 @@ static struct snd_soc_dai_link mt7986_wm8960_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS |
+ SND_SOC_DAIFMT_CBC_CFC |
SND_SOC_DAIFMT_GATED,
SND_SOC_DAILINK_REG(codec),
},
diff --git a/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c b/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c
index 03250273ea9c..04ed0cfec174 100644
--- a/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c
+++ b/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c
@@ -1212,15 +1212,15 @@ static const struct of_device_id mt8173_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8173_afe_pcm_dt_match);
static const struct dev_pm_ops mt8173_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8173_afe_runtime_suspend,
- mt8173_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt8173_afe_runtime_suspend,
+ mt8173_afe_runtime_resume, NULL)
};
static struct platform_driver mt8173_afe_pcm_driver = {
.driver = {
.name = "mt8173-afe-pcm",
.of_match_table = mt8173_afe_pcm_dt_match,
- .pm = &mt8173_afe_pm_ops,
+ .pm = pm_ptr(&mt8173_afe_pm_ops),
},
.probe = mt8173_afe_pcm_dev_probe,
.remove = mt8173_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt8173/mt8173-max98090.c b/sound/soc/mediatek/mt8173/mt8173-max98090.c
index 0724564cee6a..49ebb67c818a 100644
--- a/sound/soc/mediatek/mt8173/mt8173-max98090.c
+++ b/sound/soc/mediatek/mt8173/mt8173-max98090.c
@@ -122,7 +122,7 @@ static struct snd_soc_dai_link mt8173_max98090_dais[] = {
.init = mt8173_max98090_init,
.ops = &mt8173_max98090_ops,
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
SND_SOC_DAILINK_REG(hifi),
},
};
diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c
index d8e4e70d834c..dc063d85e62f 100644
--- a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c
+++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c
@@ -156,7 +156,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5514_dais[] = {
.no_pcm = 1,
.init = mt8173_rt5650_rt5514_init,
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.ops = &mt8173_rt5650_rt5514_ops,
.ignore_pmdown_time = 1,
SND_SOC_DAILINK_REG(codec),
diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c
index 488f2314dbf7..a1ba5df87e1e 100644
--- a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c
+++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c
@@ -197,7 +197,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = {
.no_pcm = 1,
.init = mt8173_rt5650_rt5676_init,
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.ops = &mt8173_rt5650_rt5676_ops,
.ignore_pmdown_time = 1,
SND_SOC_DAILINK_REG(codec),
@@ -214,7 +214,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = {
.stream_name = "rt5650_rt5676 intercodec",
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBM_CFM,
+ SND_SOC_DAIFMT_CBP_CFP,
SND_SOC_DAILINK_REG(intercodec),
},
};
diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650.c b/sound/soc/mediatek/mt8173/mt8173-rt5650.c
index 59c19fdd8675..7d6a3586cdd5 100644
--- a/sound/soc/mediatek/mt8173/mt8173-rt5650.c
+++ b/sound/soc/mediatek/mt8173/mt8173-rt5650.c
@@ -235,7 +235,7 @@ static struct snd_soc_dai_link mt8173_rt5650_dais[] = {
.no_pcm = 1,
.init = mt8173_rt5650_init,
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.ops = &mt8173_rt5650_ops,
.ignore_pmdown_time = 1,
SND_SOC_DAILINK_REG(codec),
diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
index 3f377ba4ad53..e8884354995c 100644
--- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
+++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
@@ -424,342 +424,97 @@ static const struct snd_soc_component_driver mt8183_afe_pcm_dai_component = {
.name = "mt8183-afe-pcm-dai",
};
+#define MT8183_MEMIF_BASE(_id, _en_reg, _fs_reg, _mono_reg) \
+ [MT8183_MEMIF_##_id] = { \
+ .name = #_id, \
+ .id = MT8183_MEMIF_##_id, \
+ .reg_ofs_base = AFE_##_id##_BASE, \
+ .reg_ofs_cur = AFE_##_id##_CUR, \
+ .reg_ofs_end = AFE_##_id##_END, \
+ .fs_reg = (_fs_reg), \
+ .fs_shift = _id##_MODE_SFT, \
+ .fs_maskbit = _id##_MODE_MASK, \
+ .mono_reg = (_mono_reg), \
+ .mono_shift = _id##_DATA_SFT, \
+ .enable_reg = (_en_reg), \
+ .enable_shift = _id##_ON_SFT, \
+ .hd_reg = AFE_MEMIF_HD_MODE, \
+ .hd_align_reg = AFE_MEMIF_HDALIGN, \
+ .hd_shift = _id##_HD_SFT, \
+ .hd_align_mshift = _id##_HD_ALIGN_SFT, \
+ .agent_disable_reg = -1, \
+ .agent_disable_shift = -1, \
+ .msb_reg = -1, \
+ .msb_shift = -1, \
+ }
+
+#define MT8183_MEMIF(_id, _fs_reg, _mono_reg) \
+ MT8183_MEMIF_BASE(_id, AFE_DAC_CON0, _fs_reg, _mono_reg)
+
+/* For convenience with macros: missing register fields */
+#define MOD_DAI_DATA_SFT -1
+#define HDMI_MODE_SFT -1
+#define HDMI_MODE_MASK -1
+#define HDMI_DATA_SFT -1
+#define HDMI_ON_SFT -1
+
+/* For convenience with macros: register name differences */
+#define AFE_VUL12_BASE AFE_VUL_D2_BASE
+#define AFE_VUL12_CUR AFE_VUL_D2_CUR
+#define AFE_VUL12_END AFE_VUL_D2_END
+#define AWB2_HD_ALIGN_SFT AWB2_ALIGN_SFT
+#define VUL12_DATA_SFT VUL12_MONO_SFT
+#define AFE_HDMI_BASE AFE_HDMI_OUT_BASE
+#define AFE_HDMI_CUR AFE_HDMI_OUT_CUR
+#define AFE_HDMI_END AFE_HDMI_OUT_END
+
static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
- [MT8183_MEMIF_DL1] = {
- .name = "DL1",
- .id = MT8183_MEMIF_DL1,
- .reg_ofs_base = AFE_DL1_BASE,
- .reg_ofs_cur = AFE_DL1_CUR,
- .fs_reg = AFE_DAC_CON1,
- .fs_shift = DL1_MODE_SFT,
- .fs_maskbit = DL1_MODE_MASK,
- .mono_reg = AFE_DAC_CON1,
- .mono_shift = DL1_DATA_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = DL1_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = DL1_HD_SFT,
- .hd_align_mshift = DL1_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_DL2] = {
- .name = "DL2",
- .id = MT8183_MEMIF_DL2,
- .reg_ofs_base = AFE_DL2_BASE,
- .reg_ofs_cur = AFE_DL2_CUR,
- .fs_reg = AFE_DAC_CON1,
- .fs_shift = DL2_MODE_SFT,
- .fs_maskbit = DL2_MODE_MASK,
- .mono_reg = AFE_DAC_CON1,
- .mono_shift = DL2_DATA_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = DL2_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = DL2_HD_SFT,
- .hd_align_mshift = DL2_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_DL3] = {
- .name = "DL3",
- .id = MT8183_MEMIF_DL3,
- .reg_ofs_base = AFE_DL3_BASE,
- .reg_ofs_cur = AFE_DL3_CUR,
- .fs_reg = AFE_DAC_CON2,
- .fs_shift = DL3_MODE_SFT,
- .fs_maskbit = DL3_MODE_MASK,
- .mono_reg = AFE_DAC_CON1,
- .mono_shift = DL3_DATA_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = DL3_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = DL3_HD_SFT,
- .hd_align_mshift = DL3_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_VUL2] = {
- .name = "VUL2",
- .id = MT8183_MEMIF_VUL2,
- .reg_ofs_base = AFE_VUL2_BASE,
- .reg_ofs_cur = AFE_VUL2_CUR,
- .fs_reg = AFE_DAC_CON2,
- .fs_shift = VUL2_MODE_SFT,
- .fs_maskbit = VUL2_MODE_MASK,
- .mono_reg = AFE_DAC_CON2,
- .mono_shift = VUL2_DATA_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = VUL2_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = VUL2_HD_SFT,
- .hd_align_mshift = VUL2_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_AWB] = {
- .name = "AWB",
- .id = MT8183_MEMIF_AWB,
- .reg_ofs_base = AFE_AWB_BASE,
- .reg_ofs_cur = AFE_AWB_CUR,
- .fs_reg = AFE_DAC_CON1,
- .fs_shift = AWB_MODE_SFT,
- .fs_maskbit = AWB_MODE_MASK,
- .mono_reg = AFE_DAC_CON1,
- .mono_shift = AWB_DATA_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = AWB_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = AWB_HD_SFT,
- .hd_align_mshift = AWB_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_AWB2] = {
- .name = "AWB2",
- .id = MT8183_MEMIF_AWB2,
- .reg_ofs_base = AFE_AWB2_BASE,
- .reg_ofs_cur = AFE_AWB2_CUR,
- .fs_reg = AFE_DAC_CON2,
- .fs_shift = AWB2_MODE_SFT,
- .fs_maskbit = AWB2_MODE_MASK,
- .mono_reg = AFE_DAC_CON2,
- .mono_shift = AWB2_DATA_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = AWB2_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = AWB2_HD_SFT,
- .hd_align_mshift = AWB2_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_VUL12] = {
- .name = "VUL12",
- .id = MT8183_MEMIF_VUL12,
- .reg_ofs_base = AFE_VUL_D2_BASE,
- .reg_ofs_cur = AFE_VUL_D2_CUR,
- .fs_reg = AFE_DAC_CON0,
- .fs_shift = VUL12_MODE_SFT,
- .fs_maskbit = VUL12_MODE_MASK,
- .mono_reg = AFE_DAC_CON0,
- .mono_shift = VUL12_MONO_SFT,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = VUL12_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = VUL12_HD_SFT,
- .hd_align_mshift = VUL12_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_MOD_DAI] = {
- .name = "MOD_DAI",
- .id = MT8183_MEMIF_MOD_DAI,
- .reg_ofs_base = AFE_MOD_DAI_BASE,
- .reg_ofs_cur = AFE_MOD_DAI_CUR,
- .fs_reg = AFE_DAC_CON1,
- .fs_shift = MOD_DAI_MODE_SFT,
- .fs_maskbit = MOD_DAI_MODE_MASK,
- .mono_reg = -1,
- .mono_shift = 0,
- .enable_reg = AFE_DAC_CON0,
- .enable_shift = MOD_DAI_ON_SFT,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = MOD_DAI_HD_SFT,
- .hd_align_mshift = MOD_DAI_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
- [MT8183_MEMIF_HDMI] = {
- .name = "HDMI",
- .id = MT8183_MEMIF_HDMI,
- .reg_ofs_base = AFE_HDMI_OUT_BASE,
- .reg_ofs_cur = AFE_HDMI_OUT_CUR,
- .fs_reg = -1,
- .fs_shift = -1,
- .fs_maskbit = -1,
- .mono_reg = -1,
- .mono_shift = -1,
- .enable_reg = -1, /* control in tdm for sync start */
- .enable_shift = -1,
- .hd_reg = AFE_MEMIF_HD_MODE,
- .hd_align_reg = AFE_MEMIF_HDALIGN,
- .hd_shift = HDMI_HD_SFT,
- .hd_align_mshift = HDMI_HD_ALIGN_SFT,
- .agent_disable_reg = -1,
- .agent_disable_shift = -1,
- .msb_reg = -1,
- .msb_shift = -1,
- },
+ MT8183_MEMIF(DL1, AFE_DAC_CON1, AFE_DAC_CON1),
+ MT8183_MEMIF(DL2, AFE_DAC_CON1, AFE_DAC_CON1),
+ MT8183_MEMIF(DL3, AFE_DAC_CON2, AFE_DAC_CON1),
+ MT8183_MEMIF(VUL2, AFE_DAC_CON2, AFE_DAC_CON2),
+ MT8183_MEMIF(AWB, AFE_DAC_CON1, AFE_DAC_CON1),
+ MT8183_MEMIF(AWB2, AFE_DAC_CON2, AFE_DAC_CON2),
+ MT8183_MEMIF(VUL12, AFE_DAC_CON0, AFE_DAC_CON0),
+ MT8183_MEMIF(MOD_DAI, AFE_DAC_CON1, -1),
+ /* enable control in tdm for sync start */
+ MT8183_MEMIF_BASE(HDMI, -1, -1, -1),
};
+#define MT8183_AFE_IRQ_BASE(_id, _fs_reg, _fs_shift, _fs_maskbit) \
+ [MT8183_IRQ_##_id] = { \
+ .id = MT8183_IRQ_##_id, \
+ .irq_cnt_reg = AFE_IRQ_MCU_CNT##_id, \
+ .irq_cnt_shift = 0, \
+ .irq_cnt_maskbit = 0x3ffff, \
+ .irq_fs_reg = _fs_reg, \
+ .irq_fs_shift = _fs_shift, \
+ .irq_fs_maskbit = _fs_maskbit, \
+ .irq_en_reg = AFE_IRQ_MCU_CON0, \
+ .irq_en_shift = IRQ##_id##_MCU_ON_SFT, \
+ .irq_clr_reg = AFE_IRQ_MCU_CLR, \
+ .irq_clr_shift = IRQ##_id##_MCU_CLR_SFT, \
+ }
+
+#define MT8183_AFE_IRQ(_id) \
+ MT8183_AFE_IRQ_BASE(_id, AFE_IRQ_MCU_CON1 + _id / 8 * 4, \
+ IRQ##_id##_MCU_MODE_SFT, \
+ IRQ##_id##_MCU_MODE_MASK)
+
+#define MT8183_AFE_IRQ_NOFS(_id) MT8183_AFE_IRQ_BASE(_id, -1, -1, -1)
+
static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = {
- [MT8183_IRQ_0] = {
- .id = MT8183_IRQ_0,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT0,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ0_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ0_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ0_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ0_MCU_CLR_SFT,
- },
- [MT8183_IRQ_1] = {
- .id = MT8183_IRQ_1,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT1,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ1_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ1_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ1_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ1_MCU_CLR_SFT,
- },
- [MT8183_IRQ_2] = {
- .id = MT8183_IRQ_2,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT2,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ2_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ2_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ2_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ2_MCU_CLR_SFT,
- },
- [MT8183_IRQ_3] = {
- .id = MT8183_IRQ_3,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT3,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ3_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ3_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ3_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ3_MCU_CLR_SFT,
- },
- [MT8183_IRQ_4] = {
- .id = MT8183_IRQ_4,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT4,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ4_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ4_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ4_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ4_MCU_CLR_SFT,
- },
- [MT8183_IRQ_5] = {
- .id = MT8183_IRQ_5,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT5,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ5_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ5_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ5_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ5_MCU_CLR_SFT,
- },
- [MT8183_IRQ_6] = {
- .id = MT8183_IRQ_6,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT6,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ6_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ6_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ6_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ6_MCU_CLR_SFT,
- },
- [MT8183_IRQ_7] = {
- .id = MT8183_IRQ_7,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT7,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON1,
- .irq_fs_shift = IRQ7_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ7_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ7_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ7_MCU_CLR_SFT,
- },
- [MT8183_IRQ_8] = {
- .id = MT8183_IRQ_8,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT8,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = -1,
- .irq_fs_shift = -1,
- .irq_fs_maskbit = -1,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ8_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ8_MCU_CLR_SFT,
- },
- [MT8183_IRQ_11] = {
- .id = MT8183_IRQ_11,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT11,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON2,
- .irq_fs_shift = IRQ11_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ11_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ11_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ11_MCU_CLR_SFT,
- },
- [MT8183_IRQ_12] = {
- .id = MT8183_IRQ_12,
- .irq_cnt_reg = AFE_IRQ_MCU_CNT12,
- .irq_cnt_shift = 0,
- .irq_cnt_maskbit = 0x3ffff,
- .irq_fs_reg = AFE_IRQ_MCU_CON2,
- .irq_fs_shift = IRQ12_MCU_MODE_SFT,
- .irq_fs_maskbit = IRQ12_MCU_MODE_MASK,
- .irq_en_reg = AFE_IRQ_MCU_CON0,
- .irq_en_shift = IRQ12_MCU_ON_SFT,
- .irq_clr_reg = AFE_IRQ_MCU_CLR,
- .irq_clr_shift = IRQ12_MCU_CLR_SFT,
- },
+ MT8183_AFE_IRQ(0),
+ MT8183_AFE_IRQ(1),
+ MT8183_AFE_IRQ(2),
+ MT8183_AFE_IRQ(3),
+ MT8183_AFE_IRQ(4),
+ MT8183_AFE_IRQ(5),
+ MT8183_AFE_IRQ(6),
+ MT8183_AFE_IRQ(7),
+ MT8183_AFE_IRQ_NOFS(8),
+ MT8183_AFE_IRQ(11),
+ MT8183_AFE_IRQ(12),
};
static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg)
@@ -767,86 +522,46 @@ static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg)
/* these auto-gen reg has read-only bit, so put it as volatile */
/* volatile reg cannot be cached, so cannot be set when power off */
switch (reg) {
- case AUDIO_TOP_CON0: /* reg bit controlled by CCF */
- case AUDIO_TOP_CON1: /* reg bit controlled by CCF */
+ case AUDIO_TOP_CON0 ... AUDIO_TOP_CON1: /* reg bit controlled by CCF */
case AUDIO_TOP_CON3:
- case AFE_DL1_CUR:
- case AFE_DL1_END:
- case AFE_DL2_CUR:
- case AFE_DL2_END:
- case AFE_AWB_END:
- case AFE_AWB_CUR:
- case AFE_VUL_END:
- case AFE_VUL_CUR:
- case AFE_MEMIF_MON0:
- case AFE_MEMIF_MON1:
- case AFE_MEMIF_MON2:
- case AFE_MEMIF_MON3:
- case AFE_MEMIF_MON4:
- case AFE_MEMIF_MON5:
- case AFE_MEMIF_MON6:
- case AFE_MEMIF_MON7:
- case AFE_MEMIF_MON8:
- case AFE_MEMIF_MON9:
- case AFE_ADDA_SRC_DEBUG_MON0:
- case AFE_ADDA_SRC_DEBUG_MON1:
- case AFE_ADDA_UL_SRC_MON0:
- case AFE_ADDA_UL_SRC_MON1:
+ case AFE_DL1_CUR ... AFE_DL1_END:
+ case AFE_DL2_CUR ... AFE_DL2_END:
+ case AFE_AWB_END ... AFE_AWB_CUR:
+ case AFE_VUL_END ... AFE_VUL_CUR:
+ case AFE_MEMIF_MON0 ... AFE_MEMIF_MON9:
+ case AFE_ADDA_SRC_DEBUG_MON0 ... AFE_ADDA_SRC_DEBUG_MON1:
+ case AFE_ADDA_UL_SRC_MON0 ... AFE_ADDA_UL_SRC_MON1:
case AFE_SIDETONE_MON:
- case AFE_SIDETONE_CON0:
- case AFE_SIDETONE_COEFF:
+ case AFE_SIDETONE_CON0 ... AFE_SIDETONE_COEFF:
case AFE_BUS_MON0:
- case AFE_MRGIF_MON0:
- case AFE_MRGIF_MON1:
- case AFE_MRGIF_MON2:
- case AFE_I2S_MON:
+ case AFE_MRGIF_MON0 ... AFE_I2S_MON:
case AFE_DAC_MON:
- case AFE_VUL2_END:
- case AFE_VUL2_CUR:
- case AFE_IRQ0_MCU_CNT_MON:
- case AFE_IRQ6_MCU_CNT_MON:
- case AFE_MOD_DAI_END:
- case AFE_MOD_DAI_CUR:
- case AFE_VUL_D2_END:
- case AFE_VUL_D2_CUR:
- case AFE_DL3_CUR:
- case AFE_DL3_END:
+ case AFE_VUL2_END ... AFE_VUL2_CUR:
+ case AFE_IRQ0_MCU_CNT_MON ... AFE_IRQ6_MCU_CNT_MON:
+ case AFE_MOD_DAI_END ... AFE_MOD_DAI_CUR:
+ case AFE_VUL_D2_END ... AFE_VUL_D2_CUR:
+ case AFE_DL3_CUR ... AFE_DL3_END:
case AFE_HDMI_OUT_CON0:
- case AFE_HDMI_OUT_CUR:
- case AFE_HDMI_OUT_END:
- case AFE_IRQ3_MCU_CNT_MON:
- case AFE_IRQ4_MCU_CNT_MON:
- case AFE_IRQ_MCU_STATUS:
- case AFE_IRQ_MCU_CLR:
+ case AFE_HDMI_OUT_CUR ... AFE_HDMI_OUT_END:
+ case AFE_IRQ3_MCU_CNT_MON... AFE_IRQ4_MCU_CNT_MON:
+ case AFE_IRQ_MCU_STATUS ... AFE_IRQ_MCU_CLR:
case AFE_IRQ_MCU_MON2:
- case AFE_IRQ1_MCU_CNT_MON:
- case AFE_IRQ2_MCU_CNT_MON:
- case AFE_IRQ1_MCU_EN_CNT_MON:
- case AFE_IRQ5_MCU_CNT_MON:
+ case AFE_IRQ1_MCU_CNT_MON ... AFE_IRQ5_MCU_CNT_MON:
case AFE_IRQ7_MCU_CNT_MON:
case AFE_GAIN1_CUR:
case AFE_GAIN2_CUR:
case AFE_SRAM_DELSEL_CON0:
- case AFE_SRAM_DELSEL_CON2:
- case AFE_SRAM_DELSEL_CON3:
- case AFE_ASRC_2CH_CON12:
- case AFE_ASRC_2CH_CON13:
+ case AFE_SRAM_DELSEL_CON2 ... AFE_SRAM_DELSEL_CON3:
+ case AFE_ASRC_2CH_CON12 ... AFE_ASRC_2CH_CON13:
case PCM_INTF_CON2:
- case FPGA_CFG0:
- case FPGA_CFG1:
- case FPGA_CFG2:
- case FPGA_CFG3:
- case AUDIO_TOP_DBG_MON0:
- case AUDIO_TOP_DBG_MON1:
- case AFE_IRQ8_MCU_CNT_MON:
- case AFE_IRQ11_MCU_CNT_MON:
- case AFE_IRQ12_MCU_CNT_MON:
+ case FPGA_CFG0 ... FPGA_CFG1:
+ case FPGA_CFG2 ... FPGA_CFG3:
+ case AUDIO_TOP_DBG_MON0 ... AUDIO_TOP_DBG_MON1:
+ case AFE_IRQ8_MCU_CNT_MON ... AFE_IRQ12_MCU_CNT_MON:
case AFE_CBIP_MON0:
- case AFE_CBIP_SLV_MUX_MON0:
- case AFE_CBIP_SLV_DECODER_MON0:
+ case AFE_CBIP_SLV_MUX_MON0 ... AFE_CBIP_SLV_DECODER_MON0:
case AFE_ADDA6_SRC_DEBUG_MON0:
- case AFE_ADD6A_UL_SRC_MON0:
- case AFE_ADDA6_UL_SRC_MON1:
+ case AFE_ADD6A_UL_SRC_MON0... AFE_ADDA6_UL_SRC_MON1:
case AFE_DL1_CUR_MSB:
case AFE_DL2_CUR_MSB:
case AFE_AWB_CUR_MSB:
@@ -856,55 +571,23 @@ static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg)
case AFE_VUL_D2_CUR_MSB:
case AFE_DL3_CUR_MSB:
case AFE_HDMI_OUT_CUR_MSB:
- case AFE_AWB2_END:
- case AFE_AWB2_CUR:
+ case AFE_AWB2_END ... AFE_AWB2_CUR:
case AFE_AWB2_CUR_MSB:
- case AFE_ADDA_DL_SDM_FIFO_MON:
- case AFE_ADDA_DL_SRC_LCH_MON:
- case AFE_ADDA_DL_SRC_RCH_MON:
- case AFE_ADDA_DL_SDM_OUT_MON:
- case AFE_CONNSYS_I2S_MON:
- case AFE_ASRC_2CH_CON0:
- case AFE_ASRC_2CH_CON2:
- case AFE_ASRC_2CH_CON3:
- case AFE_ASRC_2CH_CON4:
- case AFE_ASRC_2CH_CON5:
- case AFE_ASRC_2CH_CON7:
- case AFE_ASRC_2CH_CON8:
- case AFE_MEMIF_MON12:
- case AFE_MEMIF_MON13:
- case AFE_MEMIF_MON14:
- case AFE_MEMIF_MON15:
- case AFE_MEMIF_MON16:
- case AFE_MEMIF_MON17:
- case AFE_MEMIF_MON18:
- case AFE_MEMIF_MON19:
- case AFE_MEMIF_MON20:
- case AFE_MEMIF_MON21:
- case AFE_MEMIF_MON22:
- case AFE_MEMIF_MON23:
- case AFE_MEMIF_MON24:
- case AFE_ADDA_MTKAIF_MON0:
- case AFE_ADDA_MTKAIF_MON1:
+ case AFE_ADDA_DL_SDM_FIFO_MON ... AFE_ADDA_DL_SDM_OUT_MON:
+ case AFE_CONNSYS_I2S_MON ... AFE_ASRC_2CH_CON0:
+ case AFE_ASRC_2CH_CON2 ... AFE_ASRC_2CH_CON5:
+ case AFE_ASRC_2CH_CON7 ... AFE_ASRC_2CH_CON8:
+ case AFE_MEMIF_MON12 ... AFE_MEMIF_MON24:
+ case AFE_ADDA_MTKAIF_MON0 ... AFE_ADDA_MTKAIF_MON1:
case AFE_AUD_PAD_TOP:
case AFE_GENERAL1_ASRC_2CH_CON0:
- case AFE_GENERAL1_ASRC_2CH_CON2:
- case AFE_GENERAL1_ASRC_2CH_CON3:
- case AFE_GENERAL1_ASRC_2CH_CON4:
- case AFE_GENERAL1_ASRC_2CH_CON5:
- case AFE_GENERAL1_ASRC_2CH_CON7:
- case AFE_GENERAL1_ASRC_2CH_CON8:
- case AFE_GENERAL1_ASRC_2CH_CON12:
- case AFE_GENERAL1_ASRC_2CH_CON13:
+ case AFE_GENERAL1_ASRC_2CH_CON2 ... AFE_GENERAL1_ASRC_2CH_CON5:
+ case AFE_GENERAL1_ASRC_2CH_CON7 ... AFE_GENERAL1_ASRC_2CH_CON8:
+ case AFE_GENERAL1_ASRC_2CH_CON12 ... AFE_GENERAL1_ASRC_2CH_CON13:
case AFE_GENERAL2_ASRC_2CH_CON0:
- case AFE_GENERAL2_ASRC_2CH_CON2:
- case AFE_GENERAL2_ASRC_2CH_CON3:
- case AFE_GENERAL2_ASRC_2CH_CON4:
- case AFE_GENERAL2_ASRC_2CH_CON5:
- case AFE_GENERAL2_ASRC_2CH_CON7:
- case AFE_GENERAL2_ASRC_2CH_CON8:
- case AFE_GENERAL2_ASRC_2CH_CON12:
- case AFE_GENERAL2_ASRC_2CH_CON13:
+ case AFE_GENERAL2_ASRC_2CH_CON2 ... AFE_GENERAL2_ASRC_2CH_CON5:
+ case AFE_GENERAL2_ASRC_2CH_CON7 ... AFE_GENERAL2_ASRC_2CH_CON8:
+ case AFE_GENERAL2_ASRC_2CH_CON12 ... AFE_GENERAL2_ASRC_2CH_CON13:
return true;
default:
return false;
@@ -1257,15 +940,15 @@ static const struct of_device_id mt8183_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8183_afe_pcm_dt_match);
static const struct dev_pm_ops mt8183_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8183_afe_runtime_suspend,
- mt8183_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt8183_afe_runtime_suspend,
+ mt8183_afe_runtime_resume, NULL)
};
static struct platform_driver mt8183_afe_pcm_driver = {
.driver = {
.name = "mt8183-audio",
.of_match_table = mt8183_afe_pcm_dt_match,
- .pm = &mt8183_afe_pm_ops,
+ .pm = pm_ptr(&mt8183_afe_pm_ops),
},
.probe = mt8183_afe_pcm_dev_probe,
.remove = mt8183_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c
index 1d8881e0a361..3388e076ccc9 100644
--- a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c
+++ b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c
@@ -563,7 +563,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_IB_IF |
- SND_SOC_DAIFMT_CBM_CFM,
+ SND_SOC_DAIFMT_CBP_CFP,
.playback_only = 1,
.ignore_suspend = 1,
.be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
diff --git a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c
index 6267c8554c15..497a9043be7b 100644
--- a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c
+++ b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c
@@ -575,7 +575,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_IB_IF |
- SND_SOC_DAIFMT_CBM_CFM,
+ SND_SOC_DAIFMT_CBP_CFP,
.playback_only = 1,
.ignore_suspend = 1,
.be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
@@ -783,7 +783,7 @@ mt8183_mt6358_ts3a227_max98357_dev_probe(struct platform_device *pdev)
strcmp(dai_link->name, "I2S3") == 0)
dai_link->dai_fmt = SND_SOC_DAIFMT_LEFT_J |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBM_CFM;
+ SND_SOC_DAIFMT_CBP_CFP;
}
if (hdmi_codec && strcmp(dai_link->name, "TDM") == 0) {
diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-clk.c b/sound/soc/mediatek/mt8186/mt8186-afe-clk.c
index 70ec101890d3..daaca36a2d08 100644
--- a/sound/soc/mediatek/mt8186/mt8186-afe-clk.c
+++ b/sound/soc/mediatek/mt8186/mt8186-afe-clk.c
@@ -329,61 +329,6 @@ void mt8186_afe_disable_clock(struct mtk_base_afe *afe)
clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);
}
-int mt8186_afe_suspend_clock(struct mtk_base_afe *afe)
-{
- struct mt8186_afe_private *afe_priv = afe->platform_priv;
- int ret;
-
- /* set audio int bus to 26M */
- ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);
- if (ret) {
- dev_info(afe->dev, "%s clk_prepare_enable %s fail %d\n",
- __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret);
- goto clk_mux_audio_intbus_err;
- }
- ret = mt8186_set_audio_int_bus_parent(afe, CLK_CLK26M);
- if (ret)
- goto clk_mux_audio_intbus_parent_err;
-
- clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);
-
- return 0;
-
-clk_mux_audio_intbus_parent_err:
- mt8186_set_audio_int_bus_parent(afe, CLK_TOP_MAINPLL_D2_D4);
-clk_mux_audio_intbus_err:
- clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);
- return ret;
-}
-
-int mt8186_afe_resume_clock(struct mtk_base_afe *afe)
-{
- struct mt8186_afe_private *afe_priv = afe->platform_priv;
- int ret;
-
- /* set audio int bus to normal working clock */
- ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);
- if (ret) {
- dev_info(afe->dev, "%s clk_prepare_enable %s fail %d\n",
- __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret);
- goto clk_mux_audio_intbus_err;
- }
- ret = mt8186_set_audio_int_bus_parent(afe,
- CLK_TOP_MAINPLL_D2_D4);
- if (ret)
- goto clk_mux_audio_intbus_parent_err;
-
- clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);
-
- return 0;
-
-clk_mux_audio_intbus_parent_err:
- mt8186_set_audio_int_bus_parent(afe, CLK_CLK26M);
-clk_mux_audio_intbus_err:
- clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);
- return ret;
-}
-
int mt8186_apll1_enable(struct mtk_base_afe *afe)
{
struct mt8186_afe_private *afe_priv = afe->platform_priv;
diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-clk.h b/sound/soc/mediatek/mt8186/mt8186-afe-clk.h
index a9d59e506d9a..e524833ce780 100644
--- a/sound/soc/mediatek/mt8186/mt8186-afe-clk.h
+++ b/sound/soc/mediatek/mt8186/mt8186-afe-clk.h
@@ -85,8 +85,6 @@ int mt8186_afe_enable_cgs(struct mtk_base_afe *afe);
void mt8186_afe_disable_cgs(struct mtk_base_afe *afe);
int mt8186_afe_enable_clock(struct mtk_base_afe *afe);
void mt8186_afe_disable_clock(struct mtk_base_afe *afe);
-int mt8186_afe_suspend_clock(struct mtk_base_afe *afe);
-int mt8186_afe_resume_clock(struct mtk_base_afe *afe);
int mt8186_apll1_enable(struct mtk_base_afe *afe);
void mt8186_apll1_disable(struct mtk_base_afe *afe);
diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c b/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c
index bafbef96a42d..db7c93401bee 100644
--- a/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c
+++ b/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c
@@ -2978,15 +2978,15 @@ static const struct of_device_id mt8186_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8186_afe_pcm_dt_match);
static const struct dev_pm_ops mt8186_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8186_afe_runtime_suspend,
- mt8186_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt8186_afe_runtime_suspend,
+ mt8186_afe_runtime_resume, NULL)
};
static struct platform_driver mt8186_afe_pcm_driver = {
.driver = {
.name = "mt8186-audio",
.of_match_table = mt8186_afe_pcm_dt_match,
- .pm = &mt8186_afe_pm_ops,
+ .pm = pm_ptr(&mt8186_afe_pm_ops),
},
.probe = mt8186_afe_pcm_dev_probe,
};
diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366.c b/sound/soc/mediatek/mt8186/mt8186-mt6366.c
index a5ef913743d4..43546012cf61 100644
--- a/sound/soc/mediatek/mt8186/mt8186-mt6366.c
+++ b/sound/soc/mediatek/mt8186/mt8186-mt6366.c
@@ -875,7 +875,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_IB_IF |
- SND_SOC_DAIFMT_CBM_CFM,
+ SND_SOC_DAIFMT_CBP_CFP,
.playback_only = 1,
.ignore_suspend = 1,
.init = mt8186_mt6366_rt1019_rt5682s_hdmi_init,
diff --git a/sound/soc/mediatek/mt8188/Makefile b/sound/soc/mediatek/mt8188/Makefile
index 1178bce45c50..b9f3e4ad7b07 100644
--- a/sound/soc/mediatek/mt8188/Makefile
+++ b/sound/soc/mediatek/mt8188/Makefile
@@ -6,6 +6,7 @@ snd-soc-mt8188-afe-y := \
mt8188-afe-pcm.o \
mt8188-audsys-clk.o \
mt8188-dai-adda.o \
+ mt8188-dai-dmic.o \
mt8188-dai-etdm.o \
mt8188-dai-pcm.o
diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c
index e69c1bb2cb23..7f411b857782 100644
--- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c
+++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c
@@ -58,7 +58,15 @@ static const char *aud_clks[MT8188_CLK_NUM] = {
[MT8188_CLK_AUD_ADC] = "aud_adc",
[MT8188_CLK_AUD_DAC_HIRES] = "aud_dac_hires",
[MT8188_CLK_AUD_A1SYS_HP] = "aud_a1sys_hp",
+ [MT8188_CLK_AUD_AFE_DMIC1] = "aud_afe_dmic1",
+ [MT8188_CLK_AUD_AFE_DMIC2] = "aud_afe_dmic2",
+ [MT8188_CLK_AUD_AFE_DMIC3] = "aud_afe_dmic3",
+ [MT8188_CLK_AUD_AFE_DMIC4] = "aud_afe_dmic4",
[MT8188_CLK_AUD_ADC_HIRES] = "aud_adc_hires",
+ [MT8188_CLK_AUD_DMIC_HIRES1] = "aud_dmic_hires1",
+ [MT8188_CLK_AUD_DMIC_HIRES2] = "aud_dmic_hires2",
+ [MT8188_CLK_AUD_DMIC_HIRES3] = "aud_dmic_hires3",
+ [MT8188_CLK_AUD_DMIC_HIRES4] = "aud_dmic_hires4",
[MT8188_CLK_AUD_I2SIN] = "aud_i2sin",
[MT8188_CLK_AUD_TDM_IN] = "aud_tdm_in",
[MT8188_CLK_AUD_I2S_OUT] = "aud_i2s_out",
diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h
index ec53c171c170..c6c78d684f3e 100644
--- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h
+++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h
@@ -54,7 +54,15 @@ enum {
MT8188_CLK_AUD_ADC,
MT8188_CLK_AUD_DAC_HIRES,
MT8188_CLK_AUD_A1SYS_HP,
+ MT8188_CLK_AUD_AFE_DMIC1,
+ MT8188_CLK_AUD_AFE_DMIC2,
+ MT8188_CLK_AUD_AFE_DMIC3,
+ MT8188_CLK_AUD_AFE_DMIC4,
MT8188_CLK_AUD_ADC_HIRES,
+ MT8188_CLK_AUD_DMIC_HIRES1,
+ MT8188_CLK_AUD_DMIC_HIRES2,
+ MT8188_CLK_AUD_DMIC_HIRES3,
+ MT8188_CLK_AUD_DMIC_HIRES4,
MT8188_CLK_AUD_I2SIN,
MT8188_CLK_AUD_TDM_IN,
MT8188_CLK_AUD_I2S_OUT,
diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-common.h b/sound/soc/mediatek/mt8188/mt8188-afe-common.h
index 1304d685a306..01aa11242e29 100644
--- a/sound/soc/mediatek/mt8188/mt8188-afe-common.h
+++ b/sound/soc/mediatek/mt8188/mt8188-afe-common.h
@@ -137,6 +137,7 @@ struct mt8188_afe_private {
int mt8188_afe_fs_timing(unsigned int rate);
/* dai register */
int mt8188_dai_adda_register(struct mtk_base_afe *afe);
+int mt8188_dai_dmic_register(struct mtk_base_afe *afe);
int mt8188_dai_etdm_register(struct mtk_base_afe *afe);
int mt8188_dai_pcm_register(struct mtk_base_afe *afe);
diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c
index 73e5c63aeec8..ac4fdf8ba78f 100644
--- a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c
+++ b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c
@@ -652,6 +652,7 @@ static struct snd_soc_dai_driver mt8188_memif_dai_driver[] = {
static const struct snd_kcontrol_new o002_mix[] = {
SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN2, 0, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I004 Switch", AFE_CONN2, 4, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I012 Switch", AFE_CONN2, 12, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I020 Switch", AFE_CONN2, 20, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I022 Switch", AFE_CONN2, 22, 1, 0),
@@ -662,6 +663,8 @@ static const struct snd_kcontrol_new o002_mix[] = {
static const struct snd_kcontrol_new o003_mix[] = {
SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN3, 1, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I005 Switch", AFE_CONN3, 5, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I006 Switch", AFE_CONN3, 6, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I013 Switch", AFE_CONN3, 13, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I021 Switch", AFE_CONN3, 21, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I023 Switch", AFE_CONN3, 23, 1, 0),
@@ -672,6 +675,8 @@ static const struct snd_kcontrol_new o003_mix[] = {
static const struct snd_kcontrol_new o004_mix[] = {
SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN4, 0, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I006 Switch", AFE_CONN4, 6, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I008 Switch", AFE_CONN4, 8, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I014 Switch", AFE_CONN4, 14, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I024 Switch", AFE_CONN4, 24, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I074 Switch", AFE_CONN4_2, 10, 1, 0),
@@ -679,6 +684,8 @@ static const struct snd_kcontrol_new o004_mix[] = {
static const struct snd_kcontrol_new o005_mix[] = {
SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN5, 1, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I007 Switch", AFE_CONN5, 7, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I010 Switch", AFE_CONN5, 10, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I015 Switch", AFE_CONN5, 15, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I025 Switch", AFE_CONN5, 25, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I075 Switch", AFE_CONN5_2, 11, 1, 0),
@@ -686,6 +693,7 @@ static const struct snd_kcontrol_new o005_mix[] = {
static const struct snd_kcontrol_new o006_mix[] = {
SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN6, 0, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I008 Switch", AFE_CONN6, 8, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I016 Switch", AFE_CONN6, 16, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I026 Switch", AFE_CONN6, 26, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I076 Switch", AFE_CONN6_2, 12, 1, 0),
@@ -693,18 +701,21 @@ static const struct snd_kcontrol_new o006_mix[] = {
static const struct snd_kcontrol_new o007_mix[] = {
SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN7, 1, 1, 0),
+ SOC_DAPM_SINGLE_AUTODISABLE("I009 Switch", AFE_CONN7, 9, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I017 Switch", AFE_CONN7, 17, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I027 Switch", AFE_CONN7, 27, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I077 Switch", AFE_CONN7_2, 13, 1, 0),
};
static const struct snd_kcontrol_new o008_mix[] = {
+ SOC_DAPM_SINGLE_AUTODISABLE("I010 Switch", AFE_CONN8, 10, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I018 Switch", AFE_CONN8, 18, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I028 Switch", AFE_CONN8, 28, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I078 Switch", AFE_CONN8_2, 14, 1, 0),
};
static const struct snd_kcontrol_new o009_mix[] = {
+ SOC_DAPM_SINGLE_AUTODISABLE("I011 Switch", AFE_CONN9, 11, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I019 Switch", AFE_CONN9, 19, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I029 Switch", AFE_CONN9, 29, 1, 0),
SOC_DAPM_SINGLE_AUTODISABLE("I079 Switch", AFE_CONN9_2, 15, 1, 0),
@@ -1275,6 +1286,18 @@ static const struct snd_soc_dapm_route mt8188_memif_routes[] = {
{"O002", "I070 Switch", "I070"},
{"O003", "I071 Switch", "I071"},
+ {"O002", "I004 Switch", "I004"},
+ {"O003", "I005 Switch", "I005"},
+ {"O003", "I006 Switch", "I006"},
+ {"O004", "I006 Switch", "I006"},
+ {"O004", "I008 Switch", "I008"},
+ {"O005", "I007 Switch", "I007"},
+ {"O005", "I010 Switch", "I010"},
+ {"O006", "I008 Switch", "I008"},
+ {"O007", "I009 Switch", "I009"},
+ {"O008", "I010 Switch", "I010"},
+ {"O009", "I011 Switch", "I011"},
+
{"O034", "I000 Switch", "I000"},
{"O035", "I001 Switch", "I001"},
{"O034", "I002 Switch", "I002"},
@@ -2855,10 +2878,6 @@ static bool mt8188_is_volatile_reg(struct device *dev, unsigned int reg)
case AFE_DMIC3_SRC_DEBUG_MON0:
case AFE_DMIC3_UL_SRC_MON0:
case AFE_DMIC3_UL_SRC_MON1:
- case DMIC_GAIN1_CUR:
- case DMIC_GAIN2_CUR:
- case DMIC_GAIN3_CUR:
- case DMIC_GAIN4_CUR:
case ETDM_IN1_MONITOR:
case ETDM_IN2_MONITOR:
case ETDM_OUT1_MONITOR:
@@ -3076,6 +3095,7 @@ static int mt8188_dai_memif_register(struct mtk_base_afe *afe)
typedef int (*dai_register_cb)(struct mtk_base_afe *);
static const dai_register_cb dai_register_cbs[] = {
mt8188_dai_adda_register,
+ mt8188_dai_dmic_register,
mt8188_dai_etdm_register,
mt8188_dai_pcm_register,
mt8188_dai_memif_register,
@@ -3361,15 +3381,15 @@ static const struct of_device_id mt8188_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8188_afe_pcm_dt_match);
static const struct dev_pm_ops mt8188_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8188_afe_runtime_suspend,
- mt8188_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt8188_afe_runtime_suspend,
+ mt8188_afe_runtime_resume, NULL)
};
static struct platform_driver mt8188_afe_pcm_driver = {
.driver = {
.name = "mt8188-audio",
.of_match_table = mt8188_afe_pcm_dt_match,
- .pm = &mt8188_afe_pm_ops,
+ .pm = pm_ptr(&mt8188_afe_pm_ops),
},
.probe = mt8188_afe_pcm_dev_probe,
};
diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
index c796ad8b62ee..40d2ab0a7677 100644
--- a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
+++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
@@ -84,6 +84,10 @@ static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = {
GATE_AUD1(CLK_AUD_AFE_26M_DMIC_TM, "aud_afe_26m_dmic_tm", "top_a1sys_hp", 14),
GATE_AUD1(CLK_AUD_UL_TML_HIRES, "aud_ul_tml_hires", "top_audio_h", 16),
GATE_AUD1(CLK_AUD_ADC_HIRES, "aud_adc_hires", "top_audio_h", 17),
+ GATE_AUD1(CLK_AUD_DMIC_HIRES1, "aud_dmic_hires1", "top_audio_h", 20),
+ GATE_AUD1(CLK_AUD_DMIC_HIRES2, "aud_dmic_hires2", "top_audio_h", 21),
+ GATE_AUD1(CLK_AUD_DMIC_HIRES3, "aud_dmic_hires3", "top_audio_h", 22),
+ GATE_AUD1(CLK_AUD_DMIC_HIRES4, "aud_dmic_hires4", "top_audio_h", 23),
/* AUD3 */
GATE_AUD3(CLK_AUD_LINEIN_TUNER, "aud_linein_tuner", "top_apll5", 5),
diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h b/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h
index 6f34ffc760e0..9cb732863c10 100644
--- a/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h
+++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h
@@ -33,6 +33,10 @@ enum{
CLK_AUD_AFE_26M_DMIC_TM,
CLK_AUD_UL_TML_HIRES,
CLK_AUD_ADC_HIRES,
+ CLK_AUD_DMIC_HIRES1,
+ CLK_AUD_DMIC_HIRES2,
+ CLK_AUD_DMIC_HIRES3,
+ CLK_AUD_DMIC_HIRES4,
CLK_AUD_LINEIN_TUNER,
CLK_AUD_EARC_TUNER,
CLK_AUD_I2SIN,
diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c b/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c
new file mode 100644
index 000000000000..adcea7818be2
--- /dev/null
+++ b/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c
@@ -0,0 +1,683 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MediaTek ALSA SoC Audio DAI DMIC I/F Control
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
+ * Trevor Wu <trevor.wu@mediatek.com>
+ * Parker Yang <parker.yang@mediatek.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <sound/pcm_params.h>
+#include "mt8188-afe-clk.h"
+#include "mt8188-afe-common.h"
+#include "mt8188-reg.h"
+
+/* DMIC HW Gain configuration maximum value. */
+#define DMIC_GAIN_MAX_STEP GENMASK(19, 0)
+#define DMIC_GAIN_MAX_PER_STEP GENMASK(7, 0)
+#define DMIC_GAIN_MAX_TARGET GENMASK(27, 0)
+#define DMIC_GAIN_MAX_CURRENT GENMASK(27, 0)
+
+#define CLK_PHASE_SEL_CH1 0
+#define CLK_PHASE_SEL_CH2 ((CLK_PHASE_SEL_CH1) + 4)
+
+#define DMIC1_SRC_SEL 0
+#define DMIC2_SRC_SEL 0
+#define DMIC3_SRC_SEL 2
+#define DMIC4_SRC_SEL 0
+#define DMIC5_SRC_SEL 4
+#define DMIC6_SRC_SEL 0
+#define DMIC7_SRC_SEL 6
+#define DMIC8_SRC_SEL 0
+
+enum {
+ SUPPLY_SEQ_DMIC_GAIN,
+ SUPPLY_SEQ_DMIC_CK,
+};
+
+enum {
+ DMIC0,
+ DMIC1,
+ DMIC2,
+ DMIC3,
+ DMIC_NUM,
+};
+
+struct mtk_dai_dmic_ctrl_reg {
+ unsigned int con0;
+};
+
+struct mtk_dai_dmic_hw_gain_ctrl_reg {
+ unsigned int bypass;
+ unsigned int con0;
+};
+
+struct mtk_dai_dmic_priv {
+ unsigned int gain_on[DMIC_NUM];
+ unsigned int channels;
+ bool hires_required;
+};
+
+static const struct mtk_dai_dmic_ctrl_reg dmic_ctrl_regs[DMIC_NUM] = {
+ [DMIC0] = {
+ .con0 = AFE_DMIC0_UL_SRC_CON0,
+ },
+ [DMIC1] = {
+ .con0 = AFE_DMIC1_UL_SRC_CON0,
+ },
+ [DMIC2] = {
+ .con0 = AFE_DMIC2_UL_SRC_CON0,
+ },
+ [DMIC3] = {
+ .con0 = AFE_DMIC3_UL_SRC_CON0,
+ },
+};
+
+static const struct mtk_dai_dmic_ctrl_reg *get_dmic_ctrl_reg(int id)
+{
+ if (id < 0 || id >= DMIC_NUM)
+ return NULL;
+
+ return &dmic_ctrl_regs[id];
+}
+
+static const struct mtk_dai_dmic_hw_gain_ctrl_reg
+ dmic_hw_gain_ctrl_regs[DMIC_NUM] = {
+ [DMIC0] = {
+ .bypass = DMIC_BYPASS_HW_GAIN,
+ .con0 = DMIC_GAIN1_CON0,
+ },
+ [DMIC1] = {
+ .bypass = DMIC_BYPASS_HW_GAIN,
+ .con0 = DMIC_GAIN2_CON0,
+ },
+ [DMIC2] = {
+ .bypass = DMIC_BYPASS_HW_GAIN,
+ .con0 = DMIC_GAIN3_CON0,
+ },
+ [DMIC3] = {
+ .bypass = DMIC_BYPASS_HW_GAIN,
+ .con0 = DMIC_GAIN4_CON0,
+ },
+};
+
+static const struct mtk_dai_dmic_hw_gain_ctrl_reg
+ *get_dmic_hw_gain_ctrl_reg(struct mtk_base_afe *afe, int id)
+{
+ if ((id < 0) || (id >= DMIC_NUM)) {
+ dev_dbg(afe->dev, "%s invalid id\n", __func__);
+ return NULL;
+ }
+
+ return &dmic_hw_gain_ctrl_regs[id];
+}
+
+static void mtk_dai_dmic_hw_gain_bypass(struct mtk_base_afe *afe,
+ unsigned int id, bool bypass)
+{
+ const struct mtk_dai_dmic_hw_gain_ctrl_reg *reg;
+ unsigned int msk;
+
+ reg = get_dmic_hw_gain_ctrl_reg(afe, id);
+ if (!reg)
+ return;
+
+ switch (id) {
+ case DMIC0:
+ msk = DMIC_BYPASS_HW_GAIN_DMIC1_BYPASS;
+ break;
+ case DMIC1:
+ msk = DMIC_BYPASS_HW_GAIN_DMIC2_BYPASS;
+ break;
+ case DMIC2:
+ msk = DMIC_BYPASS_HW_GAIN_DMIC3_BYPASS;
+ break;
+ case DMIC3:
+ msk = DMIC_BYPASS_HW_GAIN_DMIC4_BYPASS;
+ break;
+ default:
+ return;
+ }
+
+ if (bypass)
+ regmap_set_bits(afe->regmap, reg->bypass, msk);
+ else
+ regmap_clear_bits(afe->regmap, reg->bypass, msk);
+}
+
+static void mtk_dai_dmic_hw_gain_on(struct mtk_base_afe *afe, unsigned int id,
+ bool on)
+{
+ const struct mtk_dai_dmic_hw_gain_ctrl_reg *reg = get_dmic_hw_gain_ctrl_reg(afe, id);
+
+ if (!reg)
+ return;
+
+ if (on)
+ regmap_set_bits(afe->regmap, reg->con0, DMIC_GAIN_CON0_GAIN_ON);
+ else
+ regmap_clear_bits(afe->regmap, reg->con0, DMIC_GAIN_CON0_GAIN_ON);
+}
+
+static const struct reg_sequence mtk_dai_dmic_iir_coeff_reg_defaults[] = {
+ { AFE_DMIC0_IIR_COEF_02_01, 0x00000000 },
+ { AFE_DMIC0_IIR_COEF_04_03, 0x00003FB8 },
+ { AFE_DMIC0_IIR_COEF_06_05, 0x3FB80000 },
+ { AFE_DMIC0_IIR_COEF_08_07, 0x3FB80000 },
+ { AFE_DMIC0_IIR_COEF_10_09, 0x0000C048 },
+ { AFE_DMIC1_IIR_COEF_02_01, 0x00000000 },
+ { AFE_DMIC1_IIR_COEF_04_03, 0x00003FB8 },
+ { AFE_DMIC1_IIR_COEF_06_05, 0x3FB80000 },
+ { AFE_DMIC1_IIR_COEF_08_07, 0x3FB80000 },
+ { AFE_DMIC1_IIR_COEF_10_09, 0x0000C048 },
+ { AFE_DMIC2_IIR_COEF_02_01, 0x00000000 },
+ { AFE_DMIC2_IIR_COEF_04_03, 0x00003FB8 },
+ { AFE_DMIC2_IIR_COEF_06_05, 0x3FB80000 },
+ { AFE_DMIC2_IIR_COEF_08_07, 0x3FB80000 },
+ { AFE_DMIC2_IIR_COEF_10_09, 0x0000C048 },
+ { AFE_DMIC3_IIR_COEF_02_01, 0x00000000 },
+ { AFE_DMIC3_IIR_COEF_04_03, 0x00003FB8 },
+ { AFE_DMIC3_IIR_COEF_06_05, 0x3FB80000 },
+ { AFE_DMIC3_IIR_COEF_08_07, 0x3FB80000 },
+ { AFE_DMIC3_IIR_COEF_10_09, 0x0000C048 },
+};
+
+static int mtk_dai_dmic_load_iir_coeff_table(struct mtk_base_afe *afe)
+{
+ return regmap_multi_reg_write(afe->regmap,
+ mtk_dai_dmic_iir_coeff_reg_defaults,
+ ARRAY_SIZE(mtk_dai_dmic_iir_coeff_reg_defaults));
+}
+
+static int mtk_dai_dmic_configure_array(struct snd_soc_dai *dai)
+{
+ struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
+ const u32 mask = PWR2_TOP_CON_DMIC8_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC7_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC6_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC5_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC4_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC3_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC2_SRC_SEL_MASK |
+ PWR2_TOP_CON_DMIC1_SRC_SEL_MASK;
+ const u32 val = PWR2_TOP_CON_DMIC8_SRC_SEL_VAL(DMIC8_SRC_SEL) |
+ PWR2_TOP_CON_DMIC7_SRC_SEL_VAL(DMIC7_SRC_SEL) |
+ PWR2_TOP_CON_DMIC6_SRC_SEL_VAL(DMIC6_SRC_SEL) |
+ PWR2_TOP_CON_DMIC5_SRC_SEL_VAL(DMIC5_SRC_SEL) |
+ PWR2_TOP_CON_DMIC4_SRC_SEL_VAL(DMIC4_SRC_SEL) |
+ PWR2_TOP_CON_DMIC3_SRC_SEL_VAL(DMIC3_SRC_SEL) |
+ PWR2_TOP_CON_DMIC2_SRC_SEL_VAL(DMIC2_SRC_SEL) |
+ PWR2_TOP_CON_DMIC1_SRC_SEL_VAL(DMIC1_SRC_SEL);
+
+ return regmap_update_bits(afe->regmap, PWR2_TOP_CON0, mask, val);
+}
+
+/* This function assumes that the caller checked that channels is valid */
+static u8 mtk_dmic_channels_to_dmic_number(unsigned int channels)
+{
+ switch (channels) {
+ case 1:
+ return DMIC0;
+ case 2:
+ return DMIC1;
+ case 3:
+ return DMIC2;
+ case 4:
+ default:
+ return DMIC3;
+ }
+}
+
+static void mtk_dai_dmic_hw_gain_enable(struct mtk_base_afe *afe,
+ unsigned int channels, bool enable)
+{
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN];
+ u8 dmic_num;
+ int i;
+
+ dmic_num = mtk_dmic_channels_to_dmic_number(channels);
+ for (i = dmic_num; i >= DMIC0; i--) {
+ if (enable && dmic_priv->gain_on[i]) {
+ mtk_dai_dmic_hw_gain_bypass(afe, i, false);
+ mtk_dai_dmic_hw_gain_on(afe, i, true);
+ } else {
+ mtk_dai_dmic_hw_gain_on(afe, i, false);
+ mtk_dai_dmic_hw_gain_bypass(afe, i, true);
+ }
+ }
+}
+
+static int mtk_dmic_gain_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol,
+ int event)
+{
+ struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
+ struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN];
+ unsigned int channels = dmic_priv->channels;
+
+ dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
+ __func__, w->name, event);
+
+ if (!channels)
+ return -EINVAL;
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ mtk_dai_dmic_hw_gain_enable(afe, channels, true);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ mtk_dai_dmic_hw_gain_enable(afe, channels, false);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int mtk_dmic_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol,
+ int event)
+{
+ struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
+ struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN];
+ const struct mtk_dai_dmic_ctrl_reg *reg = NULL;
+ unsigned int channels = dmic_priv->channels;
+ unsigned int msk;
+ u8 dmic_num;
+ int i;
+
+ dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
+ __func__, w->name, event);
+
+ if (!channels)
+ return -EINVAL;
+
+ dmic_num = mtk_dmic_channels_to_dmic_number(channels);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ /* request fifo soft rst */
+ msk = 0;
+ for (i = dmic_num; i >= DMIC0; i--)
+ msk |= PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(i);
+
+ regmap_set_bits(afe->regmap, PWR2_TOP_CON1, msk);
+
+ msk = AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL;
+
+ for (i = dmic_num; i >= DMIC0; i--) {
+ reg = get_dmic_ctrl_reg(i);
+ if (reg)
+ regmap_set_bits(afe->regmap, reg->con0, msk);
+ }
+ break;
+ case SND_SOC_DAPM_POST_PMU:
+ msk = AFE_DMIC_UL_SRC_CON0_UL_SRC_ON_TMP_CTL;
+
+ for (i = dmic_num; i >= DMIC0; i--) {
+ reg = get_dmic_ctrl_reg(i);
+ if (reg)
+ regmap_set_bits(afe->regmap, reg->con0, msk);
+ }
+
+ if (dmic_priv->hires_required) {
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]);
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]);
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]);
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]);
+ }
+
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]);
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]);
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]);
+ mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]);
+
+ /* release fifo soft rst */
+ msk = 0;
+ for (i = dmic_num; i >= DMIC0; i--)
+ msk |= PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(i);
+
+ regmap_clear_bits(afe->regmap, PWR2_TOP_CON1, msk);
+ break;
+ case SND_SOC_DAPM_PRE_PMD:
+ msk = AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_SRC_ON_TMP_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL;
+
+ for (i = dmic_num; i >= DMIC0; i--) {
+ reg = get_dmic_ctrl_reg(i);
+ if (reg)
+ regmap_set_bits(afe->regmap, reg->con0, msk);
+ }
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ /* should delayed 1/fs(smallest is 8k) = 125us before afe off */
+ usleep_range(125, 126);
+
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]);
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]);
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]);
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]);
+
+ if (dmic_priv->hires_required) {
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]);
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]);
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]);
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]);
+ }
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int mtk_dai_dmic_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN];
+ unsigned int rate = params_rate(params);
+ unsigned int channels = params_channels(params);
+ const struct mtk_dai_dmic_ctrl_reg *reg = NULL;
+ u32 val = AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH1(CLK_PHASE_SEL_CH1) |
+ AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH2(CLK_PHASE_SEL_CH2) |
+ AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL(0);
+ const u32 msk = AFE_DMIC_UL_SRC_CON0_UL_TWO_WIRE_MODE_CTL |
+ AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_MASK |
+ AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL_MASK |
+ AFE_DMIC_UL_VOICE_MODE_MASK;
+ u8 dmic_num;
+ int ret;
+ int i;
+
+ if (!channels || channels > 8)
+ return -EINVAL;
+
+ ret = mtk_dai_dmic_configure_array(dai);
+ if (ret < 0)
+ return ret;
+
+ ret = mtk_dai_dmic_load_iir_coeff_table(afe);
+ if (ret < 0)
+ return ret;
+
+ switch (rate) {
+ case 96000:
+ val |= AFE_DMIC_UL_CON0_VOCIE_MODE_96K;
+ dmic_priv->hires_required = 1;
+ break;
+ case 48000:
+ val |= AFE_DMIC_UL_CON0_VOCIE_MODE_48K;
+ dmic_priv->hires_required = 0;
+ break;
+ case 32000:
+ val |= AFE_DMIC_UL_CON0_VOCIE_MODE_32K;
+ dmic_priv->hires_required = 0;
+ break;
+ case 16000:
+ val |= AFE_DMIC_UL_CON0_VOCIE_MODE_16K;
+ dmic_priv->hires_required = 0;
+ break;
+ case 8000:
+ val |= AFE_DMIC_UL_CON0_VOCIE_MODE_8K;
+ dmic_priv->hires_required = 0;
+ break;
+ default:
+ dev_dbg(afe->dev, "%s invalid rate %u, use 48000Hz\n", __func__, rate);
+ val |= AFE_DMIC_UL_CON0_VOCIE_MODE_48K;
+ dmic_priv->hires_required = 0;
+ break;
+ }
+
+ dmic_num = mtk_dmic_channels_to_dmic_number(channels);
+ for (i = dmic_num; i >= DMIC0; i--) {
+ reg = get_dmic_ctrl_reg(i);
+ if (reg) {
+ ret = regmap_update_bits(afe->regmap, reg->con0, msk, val);
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ dmic_priv->channels = channels;
+
+ return 0;
+}
+
+static const struct snd_soc_dai_ops mtk_dai_dmic_ops = {
+ .hw_params = mtk_dai_dmic_hw_params,
+};
+
+#define MTK_DMIC_RATES (SNDRV_PCM_RATE_8000 |\
+ SNDRV_PCM_RATE_16000 |\
+ SNDRV_PCM_RATE_32000 |\
+ SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_96000)
+
+#define MTK_DMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+static struct snd_soc_dai_driver mtk_dai_dmic_driver[] = {
+ {
+ .name = "DMIC",
+ .id = MT8188_AFE_IO_DMIC_IN,
+ .capture = {
+ .stream_name = "DMIC Capture",
+ .channels_min = 1,
+ .channels_max = 8,
+ .rates = MTK_DMIC_RATES,
+ .formats = MTK_DMIC_FORMATS,
+ },
+ .ops = &mtk_dai_dmic_ops,
+ },
+};
+
+static const struct snd_soc_dapm_widget mtk_dai_dmic_widgets[] = {
+ SND_SOC_DAPM_MIXER("I004", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I005", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I006", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I007", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I008", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I009", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I010", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("I011", SND_SOC_NOPM, 0, 0, NULL, 0),
+
+ SND_SOC_DAPM_SUPPLY_S("DMIC_GAIN_ON", SUPPLY_SEQ_DMIC_GAIN,
+ SND_SOC_NOPM, 0, 0,
+ mtk_dmic_gain_event,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_SUPPLY_S("DMIC_CK_ON", SUPPLY_SEQ_DMIC_CK,
+ PWR2_TOP_CON1,
+ PWR2_TOP_CON1_DMIC_CKDIV_ON_SHIFT, 0,
+ mtk_dmic_event,
+ SND_SOC_DAPM_PRE_POST_PMU |
+ SND_SOC_DAPM_PRE_POST_PMD),
+ SND_SOC_DAPM_INPUT("DMIC_INPUT"),
+};
+
+static const struct snd_soc_dapm_route mtk_dai_dmic_routes[] = {
+ {"I004", NULL, "DMIC Capture"},
+ {"I005", NULL, "DMIC Capture"},
+ {"I006", NULL, "DMIC Capture"},
+ {"I007", NULL, "DMIC Capture"},
+ {"I008", NULL, "DMIC Capture"},
+ {"I009", NULL, "DMIC Capture"},
+ {"I010", NULL, "DMIC Capture"},
+ {"I011", NULL, "DMIC Capture"},
+ {"DMIC Capture", NULL, "DMIC_CK_ON"},
+ {"DMIC Capture", NULL, "DMIC_GAIN_ON"},
+ {"DMIC Capture", NULL, "DMIC_INPUT"},
+};
+
+static const char * const mt8188_dmic_gain_enable_text[] = {
+ "Bypass", "Connect",
+};
+
+static SOC_ENUM_SINGLE_EXT_DECL(dmic_gain_on_enum,
+ mt8188_dmic_gain_enable_text);
+
+static int mtk_dai_dmic_hw_gain_ctrl_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+ struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN];
+ unsigned int source = ucontrol->value.enumerated.item[0];
+ unsigned int *cached;
+
+ if (source >= e->items)
+ return -EINVAL;
+
+ if (!strcmp(kcontrol->id.name, "DMIC1_HW_GAIN_EN"))
+ cached = &dmic_priv->gain_on[0];
+ else if (!strcmp(kcontrol->id.name, "DMIC2_HW_GAIN_EN"))
+ cached = &dmic_priv->gain_on[1];
+ else if (!strcmp(kcontrol->id.name, "DMIC3_HW_GAIN_EN"))
+ cached = &dmic_priv->gain_on[2];
+ else if (!strcmp(kcontrol->id.name, "DMIC4_HW_GAIN_EN"))
+ cached = &dmic_priv->gain_on[3];
+ else
+ return -EINVAL;
+
+ if (source == *cached)
+ return 0;
+
+ *cached = source;
+ return 1;
+}
+
+static int mtk_dai_dmic_hw_gain_ctrl_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN];
+ unsigned int val;
+
+ if (!strcmp(kcontrol->id.name, "DMIC1_HW_GAIN_EN"))
+ val = dmic_priv->gain_on[0];
+ else if (!strcmp(kcontrol->id.name, "DMIC2_HW_GAIN_EN"))
+ val = dmic_priv->gain_on[1];
+ else if (!strcmp(kcontrol->id.name, "DMIC3_HW_GAIN_EN"))
+ val = dmic_priv->gain_on[2];
+ else if (!strcmp(kcontrol->id.name, "DMIC4_HW_GAIN_EN"))
+ val = dmic_priv->gain_on[3];
+ else
+ return -EINVAL;
+
+ ucontrol->value.enumerated.item[0] = val;
+ return 0;
+}
+
+static const struct snd_kcontrol_new mtk_dai_dmic_controls[] = {
+ SOC_ENUM_EXT("DMIC1_HW_GAIN_EN", dmic_gain_on_enum,
+ mtk_dai_dmic_hw_gain_ctrl_get,
+ mtk_dai_dmic_hw_gain_ctrl_put),
+ SOC_ENUM_EXT("DMIC2_HW_GAIN_EN", dmic_gain_on_enum,
+ mtk_dai_dmic_hw_gain_ctrl_get,
+ mtk_dai_dmic_hw_gain_ctrl_put),
+ SOC_ENUM_EXT("DMIC3_HW_GAIN_EN", dmic_gain_on_enum,
+ mtk_dai_dmic_hw_gain_ctrl_get,
+ mtk_dai_dmic_hw_gain_ctrl_put),
+ SOC_ENUM_EXT("DMIC4_HW_GAIN_EN", dmic_gain_on_enum,
+ mtk_dai_dmic_hw_gain_ctrl_get,
+ mtk_dai_dmic_hw_gain_ctrl_put),
+ SOC_SINGLE("DMIC1_HW_GAIN_TARGET", DMIC_GAIN1_CON1,
+ 0, DMIC_GAIN_MAX_TARGET, 0),
+ SOC_SINGLE("DMIC2_HW_GAIN_TARGET", DMIC_GAIN2_CON1,
+ 0, DMIC_GAIN_MAX_TARGET, 0),
+ SOC_SINGLE("DMIC3_HW_GAIN_TARGET", DMIC_GAIN3_CON1,
+ 0, DMIC_GAIN_MAX_TARGET, 0),
+ SOC_SINGLE("DMIC4_HW_GAIN_TARGET", DMIC_GAIN4_CON1,
+ 0, DMIC_GAIN_MAX_TARGET, 0),
+ SOC_SINGLE("DMIC1_HW_GAIN_CURRENT", DMIC_GAIN1_CUR,
+ 0, DMIC_GAIN_MAX_CURRENT, 0),
+ SOC_SINGLE("DMIC2_HW_GAIN_CURRENT", DMIC_GAIN2_CUR,
+ 0, DMIC_GAIN_MAX_CURRENT, 0),
+ SOC_SINGLE("DMIC3_HW_GAIN_CURRENT", DMIC_GAIN3_CUR,
+ 0, DMIC_GAIN_MAX_CURRENT, 0),
+ SOC_SINGLE("DMIC4_HW_GAIN_CURRENT", DMIC_GAIN4_CUR,
+ 0, DMIC_GAIN_MAX_CURRENT, 0),
+ SOC_SINGLE("DMIC1_HW_GAIN_UP_STEP", DMIC_GAIN1_CON3,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC2_HW_GAIN_UP_STEP", DMIC_GAIN2_CON3,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC3_HW_GAIN_UP_STEP", DMIC_GAIN3_CON3,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC4_HW_GAIN_UP_STEP", DMIC_GAIN4_CON3,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC1_HW_GAIN_DOWN_STEP", DMIC_GAIN1_CON2,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC2_HW_GAIN_DOWN_STEP", DMIC_GAIN2_CON2,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC3_HW_GAIN_DOWN_STEP", DMIC_GAIN3_CON2,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC4_HW_GAIN_DOWN_STEP", DMIC_GAIN4_CON2,
+ 0, DMIC_GAIN_MAX_STEP, 0),
+ SOC_SINGLE("DMIC1_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN1_CON0,
+ DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0),
+ SOC_SINGLE("DMIC2_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN2_CON0,
+ DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0),
+ SOC_SINGLE("DMIC3_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN3_CON0,
+ DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0),
+ SOC_SINGLE("DMIC4_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN4_CON0,
+ DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0),
+};
+
+static int init_dmic_priv_data(struct mtk_base_afe *afe)
+{
+ struct mt8188_afe_private *afe_priv = afe->platform_priv;
+ struct mtk_dai_dmic_priv *dmic_priv;
+
+ dmic_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_dmic_priv),
+ GFP_KERNEL);
+ if (!dmic_priv)
+ return -ENOMEM;
+
+ afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN] = dmic_priv;
+ return 0;
+}
+
+int mt8188_dai_dmic_register(struct mtk_base_afe *afe)
+{
+ struct mtk_base_afe_dai *dai;
+
+ dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
+ if (!dai)
+ return -ENOMEM;
+
+ list_add(&dai->list, &afe->sub_dais);
+
+ dai->dai_drivers = mtk_dai_dmic_driver;
+ dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_dmic_driver);
+ dai->dapm_widgets = mtk_dai_dmic_widgets;
+ dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_dmic_widgets);
+ dai->dapm_routes = mtk_dai_dmic_routes;
+ dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_dmic_routes);
+ dai->controls = mtk_dai_dmic_controls;
+ dai->num_controls = ARRAY_SIZE(mtk_dai_dmic_controls);
+
+ return init_dmic_priv_data(afe);
+}
diff --git a/sound/soc/mediatek/mt8188/mt8188-mt6359.c b/sound/soc/mediatek/mt8188/mt8188-mt6359.c
index 2d0d04e0232d..a2a76b6df631 100644
--- a/sound/soc/mediatek/mt8188/mt8188-mt6359.c
+++ b/sound/soc/mediatek/mt8188/mt8188-mt6359.c
@@ -17,6 +17,7 @@
#include "mt8188-afe-common.h"
#include "../../codecs/nau8825.h"
#include "../../codecs/mt6359.h"
+#include "../../codecs/mt6359-accdet.h"
#include "../../codecs/rt5682.h"
#include "../common/mtk-afe-platform-driver.h"
#include "../common/mtk-soundcard-driver.h"
@@ -150,6 +151,11 @@ SND_SOC_DAILINK_DEFS(dl_src,
"mt6359-snd-codec-aif1")),
DAILINK_COMP_ARRAY(COMP_EMPTY()));
+SND_SOC_DAILINK_DEFS(DMIC_BE,
+ DAILINK_COMP_ARRAY(COMP_CPU("DMIC")),
+ DAILINK_COMP_ARRAY(COMP_DUMMY()),
+ DAILINK_COMP_ARRAY(COMP_EMPTY()));
+
SND_SOC_DAILINK_DEFS(dptx,
DAILINK_COMP_ARRAY(COMP_CPU("DPTX")),
DAILINK_COMP_ARRAY(COMP_DUMMY()),
@@ -266,6 +272,17 @@ static struct snd_soc_jack_pin nau8825_jack_pins[] = {
},
};
+static struct snd_soc_jack_pin mt8188_headset_jack_pins[] = {
+ {
+ .pin = "Headphone",
+ .mask = SND_JACK_HEADPHONE,
+ },
+ {
+ .pin = "Headset Mic",
+ .mask = SND_JACK_MICROPHONE,
+ },
+};
+
static const struct snd_kcontrol_new mt8188_dumb_spk_controls[] = {
SOC_DAPM_PIN_SWITCH("Ext Spk"),
};
@@ -297,6 +314,7 @@ static const struct snd_soc_dapm_widget mt8188_rear_spk_widgets[] = {
static const struct snd_soc_dapm_widget mt8188_mt6359_widgets[] = {
SND_SOC_DAPM_HP("Headphone", NULL),
SND_SOC_DAPM_MIC("Headset Mic", NULL),
+ SND_SOC_DAPM_MIC("AP DMIC", NULL),
SND_SOC_DAPM_SINK("HDMI"),
SND_SOC_DAPM_SINK("DP"),
SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0),
@@ -500,6 +518,35 @@ static int mt8188_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd)
return 0;
}
+static int mt8188_mt6359_accdet_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
+ struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8188_JACK_HEADSET];
+ int ret;
+
+ if (!soc_card_data->accdet)
+ return 0;
+
+ ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack",
+ SND_JACK_HEADSET | SND_JACK_BTN_0 |
+ SND_JACK_BTN_1 | SND_JACK_BTN_2 |
+ SND_JACK_BTN_3,
+ jack, mt8188_headset_jack_pins,
+ ARRAY_SIZE(mt8188_headset_jack_pins));
+ if (ret) {
+ dev_err(rtd->dev, "Headset Jack create failed: %d\n", ret);
+ return ret;
+ }
+
+ ret = mt6359_accdet_enable_jack_detect(soc_card_data->accdet, jack);
+ if (ret) {
+ dev_err(rtd->dev, "Headset Jack enable failed: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
static int mt8188_mt6359_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_component *cmpnt_codec =
@@ -512,6 +559,8 @@ static int mt8188_mt6359_init(struct snd_soc_pcm_runtime *rtd)
/* mtkaif calibration */
mt8188_mt6359_mtkaif_calibration(rtd);
+ mt8188_mt6359_accdet_init(rtd);
+
return 0;
}
@@ -533,6 +582,7 @@ enum {
DAI_LINK_UL9_FE,
DAI_LINK_UL10_FE,
DAI_LINK_DL_SRC_BE,
+ DAI_LINK_DMIC_BE,
DAI_LINK_DPTX_BE,
DAI_LINK_ETDM1_IN_BE,
DAI_LINK_ETDM2_IN_BE,
@@ -1120,6 +1170,13 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = {
.playback_only = 1,
SND_SOC_DAILINK_REG(dl_src),
},
+ [DAI_LINK_DMIC_BE] = {
+ .name = "DMIC_BE",
+ .no_pcm = 1,
+ .capture_only = 1,
+ .ignore_suspend = 1,
+ SND_SOC_DAILINK_REG(DMIC_BE),
+ },
[DAI_LINK_DPTX_BE] = {
.name = "DPTX_BE",
.ops = &mt8188_dptx_ops,
@@ -1276,11 +1333,11 @@ static int mt8188_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data,
for_each_card_prelinks(card, i, dai_link) {
if (strcmp(dai_link->name, "DPTX_BE") == 0) {
if (dai_link->num_codecs &&
- strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai"))
+ !snd_soc_dlc_is_dummy(dai_link->codecs))
dai_link->init = mt8188_dptx_codec_init;
} else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) {
if (dai_link->num_codecs &&
- strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai"))
+ !snd_soc_dlc_is_dummy(dai_link->codecs))
dai_link->init = mt8188_hdmi_codec_init;
} else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 ||
strcmp(dai_link->name, "UL_SRC_BE") == 0) {
@@ -1330,7 +1387,7 @@ static int mt8188_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data,
init_es8326 = true;
}
} else {
- if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) {
+ if (!snd_soc_dlc_is_dummy(dai_link->codecs)) {
if (!init_dumb) {
dai_link->init = mt8188_dumb_amp_init;
init_dumb = true;
diff --git a/sound/soc/mediatek/mt8188/mt8188-reg.h b/sound/soc/mediatek/mt8188/mt8188-reg.h
index bdd885419ff3..2e9c65de249d 100644
--- a/sound/soc/mediatek/mt8188/mt8188-reg.h
+++ b/sound/soc/mediatek/mt8188/mt8188-reg.h
@@ -2837,9 +2837,20 @@
#define PWR2_TOP_CON_DMIC3_SRC_SEL_MASK GENMASK(16, 14)
#define PWR2_TOP_CON_DMIC2_SRC_SEL_MASK GENMASK(13, 11)
#define PWR2_TOP_CON_DMIC1_SRC_SEL_MASK GENMASK(10, 8)
+#define PWR2_TOP_CON_DMIC8_SRC_SEL_VAL(x) ((x) << 29)
+#define PWR2_TOP_CON_DMIC7_SRC_SEL_VAL(x) ((x) << 26)
+#define PWR2_TOP_CON_DMIC6_SRC_SEL_VAL(x) ((x) << 23)
+#define PWR2_TOP_CON_DMIC5_SRC_SEL_VAL(x) ((x) << 20)
+#define PWR2_TOP_CON_DMIC4_SRC_SEL_VAL(x) ((x) << 17)
+#define PWR2_TOP_CON_DMIC3_SRC_SEL_VAL(x) ((x) << 14)
+#define PWR2_TOP_CON_DMIC2_SRC_SEL_VAL(x) ((x) << 11)
+#define PWR2_TOP_CON_DMIC1_SRC_SEL_VAL(x) ((x) << 8)
/* PWR2_TOP_CON1 */
-#define PWR2_TOP_CON1_DMIC_CKDIV_ON BIT(1)
+#define PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(x) BIT(5 + 6 * (x))
+#define PWR2_TOP_CON1_DMIC_CKDIV_ON BIT(1)
+#define PWR2_TOP_CON1_DMIC_CKDIV_ON_SHIFT 1
+
/* PCM_INTF_CON1 */
#define PCM_INTF_CON1_SYNC_OUT_INV BIT(23)
@@ -2921,13 +2932,14 @@
#define AFE_DMIC_UL_SRC_CON0_UL_TWO_WIRE_MODE_CTL BIT(23)
#define AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL BIT(22)
#define AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL BIT(21)
-
+#define AFE_DMIC_UL_VOICE_MODE(x) (((x) & GENMASK(2, 0)) << 17)
#define AFE_DMIC_UL_VOICE_MODE_MASK GENMASK(19, 17)
#define AFE_DMIC_UL_CON0_VOCIE_MODE_8K AFE_DMIC_UL_VOICE_MODE(0)
#define AFE_DMIC_UL_CON0_VOCIE_MODE_16K AFE_DMIC_UL_VOICE_MODE(1)
#define AFE_DMIC_UL_CON0_VOCIE_MODE_32K AFE_DMIC_UL_VOICE_MODE(2)
#define AFE_DMIC_UL_CON0_VOCIE_MODE_48K AFE_DMIC_UL_VOICE_MODE(3)
#define AFE_DMIC_UL_CON0_VOCIE_MODE_96K AFE_DMIC_UL_VOICE_MODE(4)
+#define AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL(x) (((x) & GENMASK(2, 0)) << 7)
#define AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL_MASK GENMASK(9, 7)
#define AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL BIT(10)
#define AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL BIT(1)
@@ -2944,6 +2956,7 @@
/* DMIC_GAINx_CON0 */
#define DMIC_GAIN_CON0_GAIN_ON BIT(0)
+#define DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT 8
#define DMIC_GAIN_CON0_SAMPLE_PER_STEP_MASK GENMASK(15, 8)
/* DMIC_GAINx_CON1 */
diff --git a/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c b/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c
index 80cda7bf5ccc..fd6af74d7995 100644
--- a/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c
+++ b/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c
@@ -2313,15 +2313,15 @@ static const struct of_device_id mt8192_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8192_afe_pcm_dt_match);
static const struct dev_pm_ops mt8192_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8192_afe_runtime_suspend,
- mt8192_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt8192_afe_runtime_suspend,
+ mt8192_afe_runtime_resume, NULL)
};
static struct platform_driver mt8192_afe_pcm_driver = {
.driver = {
.name = "mt8192-audio",
.of_match_table = mt8192_afe_pcm_dt_match,
- .pm = &mt8192_afe_pm_ops,
+ .pm = pm_ptr(&mt8192_afe_pm_ops),
},
.probe = mt8192_afe_pcm_dev_probe,
.remove = mt8192_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c
index b1598cc5587e..bf483a8fb34a 100644
--- a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c
+++ b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c
@@ -920,7 +920,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_DSP_A |
SND_SOC_DAIFMT_IB_NF |
- SND_SOC_DAIFMT_CBM_CFM,
+ SND_SOC_DAIFMT_CBP_CFP,
.playback_only = 1,
.ignore_suspend = 1,
.be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
diff --git a/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c b/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
index 8016bfb35015..5d025ad72263 100644
--- a/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
+++ b/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
@@ -3188,15 +3188,15 @@ static const struct of_device_id mt8195_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8195_afe_pcm_dt_match);
static const struct dev_pm_ops mt8195_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8195_afe_runtime_suspend,
- mt8195_afe_runtime_resume, NULL)
+ RUNTIME_PM_OPS(mt8195_afe_runtime_suspend,
+ mt8195_afe_runtime_resume, NULL)
};
static struct platform_driver mt8195_afe_pcm_driver = {
.driver = {
.name = "mt8195-audio",
.of_match_table = mt8195_afe_pcm_dt_match,
- .pm = &mt8195_afe_pm_ops,
+ .pm = pm_ptr(&mt8195_afe_pm_ops),
},
.probe = mt8195_afe_pcm_dev_probe,
.remove = mt8195_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt8195/mt8195-mt6359.c b/sound/soc/mediatek/mt8195/mt8195-mt6359.c
index 2b9cb3248795..e57391c213e7 100644
--- a/sound/soc/mediatek/mt8195/mt8195-mt6359.c
+++ b/sound/soc/mediatek/mt8195/mt8195-mt6359.c
@@ -92,10 +92,6 @@ static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = {
};
static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = {
- /* headset */
- { "Headphone", NULL, "HPOL" },
- { "Headphone", NULL, "HPOR" },
- { "IN1P", NULL, "Headset Mic" },
/* SOF Uplink */
{SOF_DMA_UL4, NULL, "O034"},
{SOF_DMA_UL4, NULL, "O035"},
@@ -131,6 +127,13 @@ static const struct snd_kcontrol_new mt8195_speaker_controls[] = {
SOC_DAPM_PIN_SWITCH("Ext Spk"),
};
+static const struct snd_soc_dapm_route mt8195_rt5682_routes[] = {
+ /* headset */
+ { "Headphone", NULL, "HPOL" },
+ { "Headphone", NULL, "HPOR" },
+ { "IN1P", NULL, "Headset Mic" },
+};
+
static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = {
{ "Left Spk", NULL, "Left SPO" },
{ "Right Spk", NULL, "Right SPO" },
@@ -447,6 +450,7 @@ static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd)
snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
struct mt8195_afe_private *afe_priv = afe->platform_priv;
+ struct snd_soc_card *card = rtd->card;
int ret;
priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2];
@@ -473,7 +477,12 @@ static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd)
return ret;
}
- return 0;
+ ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt5682_routes,
+ ARRAY_SIZE(mt8195_rt5682_routes));
+ if (ret)
+ dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret);
+
+ return ret;
};
static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream,
@@ -822,12 +831,12 @@ SND_SOC_DAILINK_DEFS(ETDM1_IN_BE,
SND_SOC_DAILINK_DEFS(ETDM2_IN_BE,
DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")),
- DAILINK_COMP_ARRAY(COMP_EMPTY()),
+ DAILINK_COMP_ARRAY(COMP_DUMMY()),
DAILINK_COMP_ARRAY(COMP_EMPTY()));
SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE,
DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")),
- DAILINK_COMP_ARRAY(COMP_EMPTY()),
+ DAILINK_COMP_ARRAY(COMP_DUMMY()),
DAILINK_COMP_ARRAY(COMP_EMPTY()));
SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE,
@@ -1114,7 +1123,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.capture_only = 1,
SND_SOC_DAILINK_REG(ETDM1_IN_BE),
},
@@ -1123,7 +1132,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.capture_only = 1,
.be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
SND_SOC_DAILINK_REG(ETDM2_IN_BE),
@@ -1133,7 +1142,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.playback_only = 1,
.be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
SND_SOC_DAILINK_REG(ETDM1_OUT_BE),
@@ -1143,7 +1152,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.playback_only = 1,
SND_SOC_DAILINK_REG(ETDM2_OUT_BE),
},
@@ -1152,7 +1161,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
.playback_only = 1,
SND_SOC_DAILINK_REG(ETDM3_OUT_BE),
},
@@ -1161,7 +1170,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
.no_pcm = 1,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
SND_SOC_DAILINK_REG(PCM1_BE),
},
[DAI_LINK_UL_SRC1_BE] = {
@@ -1379,11 +1388,11 @@ static int mt8195_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data,
for_each_card_prelinks(card, i, dai_link) {
if (strcmp(dai_link->name, "DPTX_BE") == 0) {
if (dai_link->num_codecs &&
- strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai"))
+ !snd_soc_dlc_is_dummy(dai_link->codecs))
dai_link->init = mt8195_dptx_codec_init;
} else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) {
if (dai_link->num_codecs &&
- strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai"))
+ !snd_soc_dlc_is_dummy(dai_link->codecs))
dai_link->init = mt8195_hdmi_codec_init;
} else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 ||
strcmp(dai_link->name, "UL_SRC1_BE") == 0 ||
@@ -1423,7 +1432,7 @@ static int mt8195_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data,
codec_init |= RT5682_CODEC_INIT;
}
} else {
- if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) {
+ if (!snd_soc_dlc_is_dummy(dai_link->codecs)) {
if (!(codec_init & DUMB_CODEC_INIT)) {
dai_link->init = mt8195_dumb_amp_init;
codec_init |= DUMB_CODEC_INIT;
@@ -1515,6 +1524,18 @@ static const struct mtk_soundcard_pdata mt8195_mt6359_max98390_rt5682_card = {
.soc_probe = mt8195_mt6359_soc_card_probe
};
+static const struct mtk_soundcard_pdata mt8195_mt6359_card = {
+ .card_name = "mt8195_mt6359",
+ .card_data = &(struct mtk_platform_card_data) {
+ .card = &mt8195_mt6359_soc_card,
+ .num_jacks = MT8195_JACK_MAX,
+ .pcm_constraints = mt8195_pcm_constraints,
+ .num_pcm_constraints = ARRAY_SIZE(mt8195_pcm_constraints),
+ },
+ .sof_priv = &mt8195_sof_priv,
+ .soc_probe = mt8195_mt6359_soc_card_probe
+};
+
static const struct of_device_id mt8195_mt6359_dt_match[] = {
{
.compatible = "mediatek,mt8195_mt6359_rt1019_rt5682",
@@ -1528,6 +1549,10 @@ static const struct of_device_id mt8195_mt6359_dt_match[] = {
.compatible = "mediatek,mt8195_mt6359_max98390_rt5682",
.data = &mt8195_mt6359_max98390_rt5682_card,
},
+ {
+ .compatible = "mediatek,mt8195_mt6359",
+ .data = &mt8195_mt6359_card,
+ },
{},
};
MODULE_DEVICE_TABLE(of, mt8195_mt6359_dt_match);
diff --git a/sound/soc/mediatek/mt8365/mt8365-afe-clk.c b/sound/soc/mediatek/mt8365/mt8365-afe-clk.c
index 8a0af2ea8546..7078c01ba19b 100644
--- a/sound/soc/mediatek/mt8365/mt8365-afe-clk.c
+++ b/sound/soc/mediatek/mt8365/mt8365-afe-clk.c
@@ -49,8 +49,7 @@ int mt8365_afe_init_audio_clk(struct mtk_base_afe *afe)
void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk)
{
- if (clk)
- clk_disable_unprepare(clk);
+ clk_disable_unprepare(clk);
}
int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,
diff --git a/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c b/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c
index 743b46572144..10793bbe9275 100644
--- a/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c
+++ b/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c
@@ -1957,7 +1957,7 @@ err_irq:
return IRQ_HANDLED;
}
-static int __maybe_unused mt8365_afe_runtime_suspend(struct device *dev)
+static int mt8365_afe_runtime_suspend(struct device *dev)
{
return 0;
}
@@ -1967,7 +1967,7 @@ static int mt8365_afe_runtime_resume(struct device *dev)
return 0;
}
-static int __maybe_unused mt8365_afe_suspend(struct device *dev)
+static int mt8365_afe_suspend(struct device *dev)
{
struct mtk_base_afe *afe = dev_get_drvdata(dev);
struct regmap *regmap = afe->regmap;
@@ -1989,7 +1989,7 @@ static int __maybe_unused mt8365_afe_suspend(struct device *dev)
return 0;
}
-static int __maybe_unused mt8365_afe_resume(struct device *dev)
+static int mt8365_afe_resume(struct device *dev)
{
struct mtk_base_afe *afe = dev_get_drvdata(dev);
struct regmap *regmap = afe->regmap;
@@ -2009,7 +2009,7 @@ static int __maybe_unused mt8365_afe_resume(struct device *dev)
return 0;
}
-static int __maybe_unused mt8365_afe_dev_runtime_suspend(struct device *dev)
+static int mt8365_afe_dev_runtime_suspend(struct device *dev)
{
struct mtk_base_afe *afe = dev_get_drvdata(dev);
@@ -2021,7 +2021,7 @@ static int __maybe_unused mt8365_afe_dev_runtime_suspend(struct device *dev)
return 0;
}
-static int __maybe_unused mt8365_afe_dev_runtime_resume(struct device *dev)
+static int mt8365_afe_dev_runtime_resume(struct device *dev)
{
struct mtk_base_afe *afe = dev_get_drvdata(dev);
@@ -2250,17 +2250,16 @@ static const struct of_device_id mt8365_afe_pcm_dt_match[] = {
MODULE_DEVICE_TABLE(of, mt8365_afe_pcm_dt_match);
static const struct dev_pm_ops mt8365_afe_pm_ops = {
- SET_RUNTIME_PM_OPS(mt8365_afe_dev_runtime_suspend,
- mt8365_afe_dev_runtime_resume, NULL)
- SET_SYSTEM_SLEEP_PM_OPS(mt8365_afe_suspend,
- mt8365_afe_resume)
+ RUNTIME_PM_OPS(mt8365_afe_dev_runtime_suspend,
+ mt8365_afe_dev_runtime_resume, NULL)
+ SYSTEM_SLEEP_PM_OPS(mt8365_afe_suspend, mt8365_afe_resume)
};
static struct platform_driver mt8365_afe_pcm_driver = {
.driver = {
.name = "mt8365-afe-pcm",
.of_match_table = mt8365_afe_pcm_dt_match,
- .pm = &mt8365_afe_pm_ops,
+ .pm = pm_ptr(&mt8365_afe_pm_ops),
},
.probe = mt8365_afe_pcm_dev_probe,
.remove = mt8365_afe_pcm_dev_remove,
diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c b/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c
index 11b9a5bc7163..cb9beb172ed5 100644
--- a/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c
+++ b/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c
@@ -313,7 +313,7 @@ static int mt8365_dai_set_config(struct mtk_base_afe *afe,
}
if ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) ==
- SND_SOC_DAIFMT_CBM_CFM) {
+ SND_SOC_DAIFMT_CBP_CFP) {
val |= AFE_I2S_CON_SRC_SLAVE;
val &= ~(u32)AFE_I2S_CON_FROM_IO_MUX;//from consys
}
@@ -523,7 +523,7 @@ static int mt8365_dai_i2s_startup(struct snd_pcm_substream *substream,
bool i2s_in_slave =
(substream->stream == SNDRV_PCM_STREAM_CAPTURE) &&
((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) ==
- SND_SOC_DAIFMT_CBM_CFM);
+ SND_SOC_DAIFMT_CBP_CFP);
mt8365_afe_enable_main_clk(afe);
@@ -551,7 +551,7 @@ static void mt8365_dai_i2s_shutdown(struct snd_pcm_substream *substream,
bool i2s_in_slave =
(substream->stream == SNDRV_PCM_STREAM_CAPTURE) &&
((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) ==
- SND_SOC_DAIFMT_CBM_CFM);
+ SND_SOC_DAIFMT_CBP_CFP);
if (be->prepared[substream->stream]) {
if (reset_i2s_out_change)
@@ -613,7 +613,7 @@ static int mt8365_dai_i2s_prepare(struct snd_pcm_substream *substream,
if (apply_i2s_in_change) {
if ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK)
- == SND_SOC_DAIFMT_CBM_CFM) {
+ == SND_SOC_DAIFMT_CBP_CFP) {
ret = mt8365_afe_set_2nd_i2s_asrc(afe, 32000, rate,
(unsigned int)bit_width,
0, 0, 1);
@@ -659,7 +659,7 @@ static int mt8365_dai_i2s_prepare(struct snd_pcm_substream *substream,
mt8365_dai_set_enable(afe, i2s_data, true, true);
if ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK)
- == SND_SOC_DAIFMT_CBM_CFM)
+ == SND_SOC_DAIFMT_CBP_CFP)
mt8365_afe_set_2nd_i2s_asrc_enable(afe, true);
be->prepared[SNDRV_PCM_STREAM_CAPTURE] = true;
@@ -712,7 +712,7 @@ static int mt8365_afe_2nd_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
be->fmt_mode |= (fmt & SND_SOC_DAIFMT_INV_MASK);
- if (((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM))
+ if (((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBP_CFP))
be->fmt_mode |= (fmt & SND_SOC_DAIFMT_MASTER_MASK);
return 0;
@@ -812,11 +812,10 @@ static const struct snd_soc_dapm_route mtk_dai_i2s_routes[] = {
static int mt8365_dai_i2s_set_priv(struct mtk_base_afe *afe)
{
int i, ret;
- struct mt8365_afe_private *afe_priv = afe->platform_priv;
for (i = 0; i < DAI_I2S_NUM; i++) {
ret = mt8365_dai_set_priv(afe, mt8365_i2s_priv[i].id,
- sizeof(*afe_priv),
+ sizeof(mt8365_i2s_priv[i]),
&mt8365_i2s_priv[i]);
if (ret)
return ret;
diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c b/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c
index 3373b88da28e..0ec114a566ad 100644
--- a/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c
+++ b/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c
@@ -189,10 +189,10 @@ static int mt8365_dai_pcm1_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
}
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
+ case SND_SOC_DAIFMT_CBP_CFP:
pcm_priv->slave_mode = true;
break;
- case SND_SOC_DAIFMT_CBS_CFS:
+ case SND_SOC_DAIFMT_CBC_CFC:
pcm_priv->slave_mode = false;
break;
default:
diff --git a/sound/soc/mediatek/mt8365/mt8365-mt6357.c b/sound/soc/mediatek/mt8365/mt8365-mt6357.c
index 9f28d6bf0323..a998fba82bfe 100644
--- a/sound/soc/mediatek/mt8365/mt8365-mt6357.c
+++ b/sound/soc/mediatek/mt8365/mt8365-mt6357.c
@@ -225,7 +225,7 @@ static struct snd_soc_dai_link mt8365_mt6357_dais[] = {
.id = DAI_LINK_2ND_I2S_INTF,
.dai_fmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBS_CFS,
+ SND_SOC_DAIFMT_CBC_CFC,
SND_SOC_DAILINK_REG(i2s3),
},
[DAI_LINK_DMIC] = {