diff options
Diffstat (limited to 'sound/soc/pxa/pxa2xx-i2s.c')
| -rw-r--r-- | sound/soc/pxa/pxa2xx-i2s.c | 197 |
1 files changed, 101 insertions, 96 deletions
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index f7ca71664112..849fbf176a70 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c @@ -1,14 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* * pxa2xx-i2s.c -- ALSA Soc Audio Layer * * Copyright 2005 Wolfson Microelectronics PLC. * Author: Liam Girdwood * lrg@slimlogic.co.uk - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. */ #include <linux/init.h> @@ -23,33 +19,32 @@ #include <sound/initval.h> #include <sound/soc.h> #include <sound/pxa2xx-lib.h> +#include <sound/dmaengine_pcm.h> -#include <mach/hardware.h> -#include <mach/dma.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> #include "pxa2xx-i2s.h" /* * I2S Controller Register and Bit Definitions */ -#define SACR0 __REG(0x40400000) /* Global Control Register */ -#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ -#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ -#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */ -#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */ -#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ -#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ +#define SACR0 (0x0000) /* Global Control Register */ +#define SACR1 (0x0004) /* Serial Audio I 2 S/MSB-Justified Control Register */ +#define SASR0 (0x000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ +#define SAIMR (0x0014) /* Serial Audio Interrupt Mask Register */ +#define SAICR (0x0018) /* Serial Audio Interrupt Clear Register */ +#define SADIV (0x0060) /* Audio Clock Divider Register. */ +#define SADR (0x0080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ #define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ #define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */ #define SACR0_EFWR (1 << 4) /* Enable EFWR Function */ #define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */ -#define SACR0_BCKD (1 << 2) /* Bit Clock Direction */ +#define SACR0_BCKD (1 << 2) /* Bit Clock Direction */ #define SACR0_ENB (1 << 0) /* Enable I2S Link */ #define SACR1_ENLBF (1 << 5) /* Enable Loopback */ -#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ +#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ #define SACR1_DREC (1 << 3) /* Disable Recording Function */ #define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ @@ -60,7 +55,7 @@ #define SASR0_TFS (1 << 3) /* Tx FIFO Service Request */ #define SASR0_BSY (1 << 2) /* I2S Busy */ #define SASR0_RNE (1 << 1) /* Rx FIFO Not Empty */ -#define SASR0_TNF (1 << 0) /* Tx FIFO Not Empty */ +#define SASR0_TNF (1 << 0) /* Tx FIFO Not Empty */ #define SAICR_ROR (1 << 6) /* Clear Rx FIFO Overrun Interrupt */ #define SAICR_TUR (1 << 5) /* Clear Tx FIFO Underrun Interrupt */ @@ -81,34 +76,31 @@ struct pxa_i2s_port { static struct pxa_i2s_port pxa_i2s; static struct clk *clk_i2s; static int clk_ena = 0; +static void __iomem *i2s_reg_base; -static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = { - .name = "I2S PCM Stereo out", - .dev_addr = __PREG(SADR), - .drcmr = &DRCMR(3), - .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | - DCMD_BURST32 | DCMD_WIDTH4, +static struct snd_dmaengine_dai_dma_data pxa2xx_i2s_pcm_stereo_out = { + .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, + .chan_name = "tx", + .maxburst = 32, }; -static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_in = { - .name = "I2S PCM Stereo in", - .dev_addr = __PREG(SADR), - .drcmr = &DRCMR(2), - .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | - DCMD_BURST32 | DCMD_WIDTH4, +static struct snd_dmaengine_dai_dma_data pxa2xx_i2s_pcm_stereo_in = { + .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, + .chan_name = "rx", + .maxburst = 32, }; static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); if (IS_ERR(clk_i2s)) return PTR_ERR(clk_i2s); - if (!cpu_dai->active) - SACR0 = 0; + if (!snd_soc_dai_active(cpu_dai)) + writel(0, i2s_reg_base + SACR0); return 0; } @@ -119,8 +111,8 @@ static int pxa_i2s_wait(void) int i; /* flush the Rx FIFO */ - for(i = 0; i < 16; i++) - SADR; + for (i = 0; i < 16; i++) + readl(i2s_reg_base + SADR); return 0; } @@ -137,11 +129,11 @@ static int pxa2xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, break; } - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBS_CFS: + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { + case SND_SOC_DAIFMT_BP_FP: pxa_i2s.master = 1; break; - case SND_SOC_DAIFMT_CBM_CFS: + case SND_SOC_DAIFMT_BC_FP: pxa_i2s.master = 0; break; default: @@ -163,9 +155,10 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { - struct pxa2xx_pcm_dma_params *dma_data; + struct snd_dmaengine_dai_dma_data *dma_data; - BUG_ON(IS_ERR(clk_i2s)); + if (WARN_ON(IS_ERR(clk_i2s))) + return -EINVAL; clk_prepare_enable(clk_i2s); clk_ena = 1; pxa_i2s_wait(); @@ -179,39 +172,39 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, /* is port used by another stream */ if (!(SACR0 & SACR0_ENB)) { - SACR0 = 0; + writel(0, i2s_reg_base + SACR0); if (pxa_i2s.master) - SACR0 |= SACR0_BCKD; + writel(readl(i2s_reg_base + SACR0) | (SACR0_BCKD), i2s_reg_base + SACR0); - SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1); - SACR1 |= pxa_i2s.fmt; + writel(readl(i2s_reg_base + SACR0) | (SACR0_RFTH(14) | SACR0_TFTH(1)), i2s_reg_base + SACR0); + writel(readl(i2s_reg_base + SACR1) | (pxa_i2s.fmt), i2s_reg_base + SACR1); } if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - SAIMR |= SAIMR_TFS; + writel(readl(i2s_reg_base + SAIMR) | (SAIMR_TFS), i2s_reg_base + SAIMR); else - SAIMR |= SAIMR_RFS; + writel(readl(i2s_reg_base + SAIMR) | (SAIMR_RFS), i2s_reg_base + SAIMR); switch (params_rate(params)) { case 8000: - SADIV = 0x48; + writel(0x48, i2s_reg_base + SADIV); break; case 11025: - SADIV = 0x34; + writel(0x34, i2s_reg_base + SADIV); break; case 16000: - SADIV = 0x24; + writel(0x24, i2s_reg_base + SADIV); break; case 22050: - SADIV = 0x1a; + writel(0x1a, i2s_reg_base + SADIV); break; case 44100: - SADIV = 0xd; + writel(0xd, i2s_reg_base + SADIV); break; case 48000: - SADIV = 0xc; + writel(0xc, i2s_reg_base + SADIV); break; case 96000: /* not in manual and possibly slightly inaccurate */ - SADIV = 0x6; + writel(0x6, i2s_reg_base + SADIV); break; } @@ -226,10 +219,10 @@ static int pxa2xx_i2s_trigger(struct snd_pcm_substream *substream, int cmd, switch (cmd) { case SNDRV_PCM_TRIGGER_START: if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - SACR1 &= ~SACR1_DRPL; + writel(readl(i2s_reg_base + SACR1) & (~SACR1_DRPL), i2s_reg_base + SACR1); else - SACR1 &= ~SACR1_DREC; - SACR0 |= SACR0_ENB; + writel(readl(i2s_reg_base + SACR1) & (~SACR1_DREC), i2s_reg_base + SACR1); + writel(readl(i2s_reg_base + SACR0) | (SACR0_ENB), i2s_reg_base + SACR0); break; case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: @@ -248,15 +241,15 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - SACR1 |= SACR1_DRPL; - SAIMR &= ~SAIMR_TFS; + writel(readl(i2s_reg_base + SACR1) | (SACR1_DRPL), i2s_reg_base + SACR1); + writel(readl(i2s_reg_base + SAIMR) & (~SAIMR_TFS), i2s_reg_base + SAIMR); } else { - SACR1 |= SACR1_DREC; - SAIMR &= ~SAIMR_RFS; + writel(readl(i2s_reg_base + SACR1) | (SACR1_DREC), i2s_reg_base + SACR1); + writel(readl(i2s_reg_base + SAIMR) & (~SAIMR_RFS), i2s_reg_base + SAIMR); } - if ((SACR1 & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) { - SACR0 &= ~SACR0_ENB; + if ((readl(i2s_reg_base + SACR1) & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) { + writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0); pxa_i2s_wait(); if (clk_ena) { clk_disable_unprepare(clk_i2s); @@ -266,37 +259,37 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream, } #ifdef CONFIG_PM -static int pxa2xx_i2s_suspend(struct snd_soc_dai *dai) +static int pxa2xx_soc_pcm_suspend(struct snd_soc_component *component) { /* store registers */ - pxa_i2s.sacr0 = SACR0; - pxa_i2s.sacr1 = SACR1; - pxa_i2s.saimr = SAIMR; - pxa_i2s.sadiv = SADIV; + pxa_i2s.sacr0 = readl(i2s_reg_base + SACR0); + pxa_i2s.sacr1 = readl(i2s_reg_base + SACR1); + pxa_i2s.saimr = readl(i2s_reg_base + SAIMR); + pxa_i2s.sadiv = readl(i2s_reg_base + SADIV); /* deactivate link */ - SACR0 &= ~SACR0_ENB; + writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0); pxa_i2s_wait(); return 0; } -static int pxa2xx_i2s_resume(struct snd_soc_dai *dai) +static int pxa2xx_soc_pcm_resume(struct snd_soc_component *component) { pxa_i2s_wait(); - SACR0 = pxa_i2s.sacr0 & ~SACR0_ENB; - SACR1 = pxa_i2s.sacr1; - SAIMR = pxa_i2s.saimr; - SADIV = pxa_i2s.sadiv; + writel(pxa_i2s.sacr0 & ~SACR0_ENB, i2s_reg_base + SACR0); + writel(pxa_i2s.sacr1, i2s_reg_base + SACR1); + writel(pxa_i2s.saimr, i2s_reg_base + SAIMR); + writel(pxa_i2s.sadiv, i2s_reg_base + SADIV); - SACR0 = pxa_i2s.sacr0; + writel(pxa_i2s.sacr0, i2s_reg_base + SACR0); return 0; } #else -#define pxa2xx_i2s_suspend NULL -#define pxa2xx_i2s_resume NULL +#define pxa2xx_soc_pcm_suspend NULL +#define pxa2xx_soc_pcm_resume NULL #endif static int pxa2xx_i2s_probe(struct snd_soc_dai *dai) @@ -311,12 +304,15 @@ static int pxa2xx_i2s_probe(struct snd_soc_dai *dai) * the SACR0[RST] bit must also be set and cleared to reset all * I2S controller registers. */ - SACR0 = SACR0_RST; - SACR0 = 0; + writel(SACR0_RST, i2s_reg_base + SACR0); + writel(0, i2s_reg_base + SACR0); /* Make sure RPL and REC are disabled */ - SACR1 = SACR1_DRPL | SACR1_DREC; + writel(SACR1_DRPL | SACR1_DREC, i2s_reg_base + SACR1); /* Along with FIFO servicing */ - SAIMR &= ~(SAIMR_RFS | SAIMR_TFS); + writel(readl(i2s_reg_base + SAIMR) & (~(SAIMR_RFS | SAIMR_TFS)), i2s_reg_base + SAIMR); + + snd_soc_dai_init_dma_data(dai, &pxa2xx_i2s_pcm_stereo_out, + &pxa2xx_i2s_pcm_stereo_in); return 0; } @@ -333,6 +329,8 @@ static int pxa2xx_i2s_remove(struct snd_soc_dai *dai) SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000) static const struct snd_soc_dai_ops pxa_i2s_dai_ops = { + .probe = pxa2xx_i2s_probe, + .remove = pxa2xx_i2s_remove, .startup = pxa2xx_i2s_startup, .shutdown = pxa2xx_i2s_shutdown, .trigger = pxa2xx_i2s_trigger, @@ -342,10 +340,6 @@ static const struct snd_soc_dai_ops pxa_i2s_dai_ops = { }; static struct snd_soc_dai_driver pxa_i2s_dai = { - .probe = pxa2xx_i2s_probe, - .remove = pxa2xx_i2s_remove, - .suspend = pxa2xx_i2s_suspend, - .resume = pxa2xx_i2s_resume, .playback = { .channels_min = 2, .channels_max = 2, @@ -357,32 +351,43 @@ static struct snd_soc_dai_driver pxa_i2s_dai = { .rates = PXA2XX_I2S_RATES, .formats = SNDRV_PCM_FMTBIT_S16_LE,}, .ops = &pxa_i2s_dai_ops, - .symmetric_rates = 1, + .symmetric_rate = 1, }; static const struct snd_soc_component_driver pxa_i2s_component = { - .name = "pxa-i2s", + .name = "pxa-i2s", + .pcm_construct = pxa2xx_soc_pcm_new, + .open = pxa2xx_soc_pcm_open, + .close = pxa2xx_soc_pcm_close, + .hw_params = pxa2xx_soc_pcm_hw_params, + .prepare = pxa2xx_soc_pcm_prepare, + .trigger = pxa2xx_soc_pcm_trigger, + .pointer = pxa2xx_soc_pcm_pointer, + .suspend = pxa2xx_soc_pcm_suspend, + .resume = pxa2xx_soc_pcm_resume, + .legacy_dai_naming = 1, }; static int pxa2xx_i2s_drv_probe(struct platform_device *pdev) { - return snd_soc_register_component(&pdev->dev, &pxa_i2s_component, - &pxa_i2s_dai, 1); -} + struct resource *res; -static int pxa2xx_i2s_drv_remove(struct platform_device *pdev) -{ - snd_soc_unregister_component(&pdev->dev); - return 0; + i2s_reg_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(i2s_reg_base)) + return PTR_ERR(i2s_reg_base); + + pxa2xx_i2s_pcm_stereo_out.addr = res->start + SADR; + pxa2xx_i2s_pcm_stereo_in.addr = res->start + SADR; + + return devm_snd_soc_register_component(&pdev->dev, &pxa_i2s_component, + &pxa_i2s_dai, 1); } static struct platform_driver pxa2xx_i2s_driver = { .probe = pxa2xx_i2s_drv_probe, - .remove = pxa2xx_i2s_drv_remove, .driver = { .name = "pxa2xx-i2s", - .owner = THIS_MODULE, }, }; |