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AgeCommit message (Expand)Author
2023-09-27drm/i915: Introduce intel_crtc_scanline_to_hw()Ville Syrjälä
2023-09-27drm/i915: Introduce skl_watermark_max_latency()Ville Syrjälä
2023-09-27drm/i915/dsb: Evade transcoder undelayed vblank when using DSBVille Syrjälä
2023-09-27drm/i915/dsb: Use non-posted register writes for legacy LUTVille Syrjälä
2023-09-27drm/i915/dsb: Load LUTs using the DSB during vblankVille Syrjälä
2023-09-27drm/i915/dsb: Don't use DSB to load the LUTs during full modesetVille Syrjälä
2023-09-27drm/i915/dsb: Add support for non-posted DSB registers writesVille Syrjälä
2023-09-27drm/i915/dsb: Introduce intel_dsb_reg_write_masked()Ville Syrjälä
2023-09-27drm/i915/dsb: Introduce intel_dsb_noop()Ville Syrjälä
2023-09-27drm/i915/dsb: Define the contents of some intstructions bit betterVille Syrjälä
2023-09-27drm/i915/dsb: Define more DSB bitsVille Syrjälä
2023-09-27drm/i915/dsb: Use non-locked register accessVille Syrjälä
2023-09-26drm/i915/cx0: prefer forward declarations over includesJani Nikula
2023-09-26drm/i915/dp: refactor aux_ch_name()Jani Nikula
2023-09-25drm/i915/irq: Clear GFX_MSTR_IRQ as part of IRQ resetGustavo Sousa
2023-09-25drm/i915: Zap some empty linesTvrtko Ursulin
2023-09-22drm/i915/display: Print display info inside driver display initializationBalasubramani Vivekanandan
2023-09-21drm/i915/bios: Fixup h/vsync_end instead of h/vtotalVille Syrjälä
2023-09-21drm/i915/lnl: Start using CDCLK through PLLStanislav Lisovskiy
2023-09-21drm/i915/xe2lpd: Add DC state supportMatt Roper
2023-09-21drm/i915/xe2lpd: Add display power wellRavi Kumar Vodapalli
2023-09-21drm/i915/lnl: Add CDCLK tableStanislav Lisovskiy
2023-09-21drm/i915/lnl: Add gmbus/ddc supportLucas De Marchi
2023-09-21drm/i915/xe2lpd: Extend Wa_15010685871Lucas De Marchi
2023-09-21drm/i915/xe2lpd: Add support for HPDGustavo Sousa
2023-09-21drm/i915/xe2lpd: Enable odd size and panning for planar yuvJuha-Pekka Heikkilä
2023-09-21drm/i915/xe2lpd: Read pin assignment from IOMLuca Coelho
2023-09-21drm/i915/xe2lpd: Handle port AUX interruptsGustavo Sousa
2023-09-21drm/i915/xe2lpd: Re-order DP AUX regsLucas De Marchi
2023-09-21drm/i915/display: Use _PICK_EVEN_2RANGES() in DP AUX regsLucas De Marchi
2023-09-21drm/i915/display: Fix style and conventions for DP AUX regsLucas De Marchi
2023-09-21drm/i915/xe2lpd: Register DE_RRMR has been removedClint Taylor
2023-09-21drm/i915/xe2lpd: Don't try to program PLANE_AUX_DISTMatt Roper
2023-09-21drm/i915/xe2lpd: Treat cursor plane as regular plane for DDB allocationStanislav Lisovskiy
2023-09-21drm/i915/xe2lpd: Add fake PCHGustavo Sousa
2023-09-21drm/i915: Re-order if/else ladder in intel_detect_pch()Lucas De Marchi
2023-09-21drm/i915/display: Remove FBC capability from fused off pipesClint Taylor
2023-09-21drm/i915/xe2lpd: FBC is now supported on all pipesMatt Roper
2023-09-21drm/i915/lnl: Add display definitionsBalasubramani Vivekanandan
2023-09-21drm/i915/xelpdp: Add XE_LPDP_FEATURESLucas De Marchi
2023-09-21Revert "drm/i915/mst: Populate connector->ddc"Ville Syrjälä
2023-09-21drm/i915: add a note about fec_enable with 128b/132bJani Nikula
2023-09-20drm/i915: Implement transcoder LRR for TGL+Ville Syrjälä
2023-09-20drm/i915: Assert that VRR is off during vblank evasion if necessaryVille Syrjälä
2023-09-20drm/i915: Update VRR parameters in fastsetVille Syrjälä
2023-09-20drm/i915: Disable VRR during seamless M/N changesVille Syrjälä
2023-09-20drm/i915: Validate that the timings are within the VRR rangeVille Syrjälä
2023-09-20drm/i915: Relocate is_in_vrr_range()Ville Syrjälä
2023-09-20drm/i915: Optimize out redundant M/N updatesVille Syrjälä
2023-09-20drm/i915: Adjust seamless_m_n flag behaviourVille Syrjälä
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