Age | Commit message (Collapse) | Author |
|
Rename DPU device node to display-controller@ae01000 to follow the
DPU schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708091656.2769390-3-dmitry.baryshkov@linaro.org
|
|
Rename DPU device node to display-controller@ae01000 to follow the
DPU schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708091656.2769390-2-dmitry.baryshkov@linaro.org
|
|
Rename DPU device node to display-controller@ae01000 to follow the
DPU schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708091656.2769390-1-dmitry.baryshkov@linaro.org
|
|
APCS now has support for providing the APSS clocks as the child device
for IPQ8074.
So, add the required DT node for it as it will later be used as the CPU
clocksource.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Sorted node based on address]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707173733.404947-4-robimarko@gmail.com
|
|
It's a home router with 1 GiB of RAM, 6 Ethernet ports, 2 USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220713200351.28526-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SocS Device Tree
updates for 5.20, please pull the following:
- William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit
counter part and adds basic support for these DSL/PON SoCs: 63158,
4912, 63146, 6856, 6813
- Anand adds basic support for the 6858 SoC
- Krzysztof fixes a missing space between a property name and its value
in a number of DTS files
* tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: Add DTS files for bcmbca SoC BCM6813
arm64: dts: Add DTS files for bcmbca SoC BCM6856
arm64: dts: Add DTS files for bcmbca SoC BCM63146
arm64: dts: broadcom: adjust whitespace around '='
ARM64: dts: Add DTS files for bcmbca SoC BCM6858
arm64: dts: Add DTS files for bcmbca SoC BCM4912
arm64: dts: Add DTS files for bcmbca SoC BCM63158
arm64: bcmbca: add arch bcmbca machine entry
Link: https://lore.kernel.org/r/20220711164451.3542127-5-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DTS updates for v5.20
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
G7 ThinQ and LG V35 ThinQ.
With IPQ8074 gaining GDSC support, this was expressed in the gcc node
and defined for the USB nodes. The SDHCI reset line was defined to get
the storage devices into a known state.
For MSM8996 interconnect providers, the second DSI interface, resets for
SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
and the Dragonboard 820c gains definitions for its LEDs.
The MSM8998 platform changes consists of a various cleanup patches, the
FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
on the "Yoshino" platform gains ToF sensor.
On SC7180 five new Trogdor based boards are added and the description of
keyboard and detachables is improved.
On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
clock rate is changed, WiFi is enabled and the modem firmware path is
updated. The Villager boards gains touchscreen, and keyboard backlight.
This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
related automotive platforms are introduced, with support for the
Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
Automotive Development Platform.
In addition to a wide range of smaller fixes on the SDM630 and SDM660
platforms, support for the secondary high speed USB controller is
introduced and the Sony Xperia "Nile" platform gains support for the RGB
status LED. Support for the Inforce IFC6560 board is introduced.
On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
scale LLCC clock rate based on profiling. CPU and cluster idle states
are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
added.
DLL/DDR configuration for SDHCI nodes are defined for SM6125.
On SM8250 the GPU per-process page tables is enabled and for RB5 the
Light Pulse Generator-based LEDs are added.
The display clock controller is introduced for SM8350.
On SM8450 this introduces the camera clock controller and the UART
typically used for Bluetooth. The interconnect path for the crypto
engine is added to the SCM node, to ensure this is adequately clocked.
The assigned-clock-rate for the display processor is dropped from
several platforms, now that the driver derrives the min and max from the
clock.
In addition to this a wide range of fixes for stylistic issues and
issues discovered through Devicetree binding validation across many
platforms and boards are introduced.
* tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits)
arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses
arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock
arm64: dts: qcom: sc7280: fix PCIe clock reference
docs: arm: index.rst: add google/chromebook-boot-flow
arm64: dts: qcom: msm8996: clean up PCIe PHY node
arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs
arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
arm64: dts: qcom: sm8450: drop USB PHY clock index
arm64: dts: qcom: sm8350: drop USB PHY clock index
arm64: dts: qcom: msm8998: drop USB PHY clock index
arm64: dts: qcom: ipq8074: drop USB PHY clock index
arm64: dts: qcom: ipq6018: drop USB PHY clock index
arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
arm64: dts: qcom: sc7280: drop PCIe PHY clock index
Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"
arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY
arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
arm64: dts: qcom: msm8996: add missing DSI clock assignments
...
Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The timer node needs ranges specified to map the 1-cell children to the
2-cell address range used in /soc. This addition never made it into the
patch that was posted and merged, so add it now.
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20220707160858.3178771-1-bjorn.andersson@linaro.org
|
|
https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM64-based SoCs Device Tree fixes
for 5.19, please pull the following:
- William corrects the BCM4906 DTS to have an armv8-timer Device Tree,
necessary for booting, and fixes the BCM4908 DTS to have a proper
'enable-method' and 'cpu-release-addr' properties for the kernel to boot
when using u-boot
* tag 'arm-soc/for-5.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcm4908: Fix cpu node for smp boot
arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC
Link: https://lore.kernel.org/r/20220712231222.97850-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Rename the GPIO related sfp properties to include the preffered -gpios
suffix. Also, with this change the dtb_check will no longer complain
when trying to verify the DTS against the sff,sfp.yaml binding.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
Rename the 'mod-def0-gpio' property to 'mod-def0-gpios' so that we use
the preferred -gpios suffix. Also, with this change the dtb_check will
not complain when trying to verify the DTS against the sff,sfp.yaml
binding.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
- added H616 EMAC compatible
- make pinctrl interrupts optionals in DT binding
- initial H616 DTSI
- added OrangePi Zero 2 board
- added X96 Mate TV box
- add VCC PI supply in pinctrl DT binding
* tag 'sunxi-dt-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h616: Add X96 Mate TV box support
arm64: dts: allwinner: h616: Add OrangePi Zero 2 board support
dt-bindings: arm: sunxi: Add two H616 board compatible strings
dt-bindings: pinctrl: sunxi: allow vcc-pi-supply
arm64: dts: allwinner: Add Allwinner H616 .dtsi file
dt-bindings: pinctrl: sunxi: Make interrupts optional
dt-bindings: arm: sunxi: Add H616 EMAC0 compatible
Link: https://lore.kernel.org/r/YsnF9cm/qniIOklj@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.20:
- Add device tree support for i.MX93 SoC.
- New board device tree: TQMa8MPQL, DH electronics i.MX8M Plus DHCOM and
PDK2, i.MX93 11x11 EVK, phyBOARD-Polis-i.MX8MM.
- A series from Abel Vesa and Viorel Suman to fix i.MX8QXP device tree
to comply with DT schema.
- Disable job ring 0 device for i.MX8MM to avoid caam_jr probe error, due
to that JR0 reservation is done in both upstream (v2.7) and downstream
(NXP lf_v2.4) TF-A.
- A series from Krzysztof Kozlowski to align gpio-key and LED node names
with dtschema.
- Add SNVS LPGPR device for i.MX8MM so that some preserving registers
becomes available as NVMEM.
- Add NoC device support for i.MX8MP SoC.
- A couple of changes from Sean Anderson to add SFP node for TA devices
for LayerScape SoCs.
- A series from Shengjiu Wang to enable bt-sco sound card support for
NXP i.MX8M EVK boards.
- Other small and random board updates.
* tag 'imx-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits)
arm64: dts: freescale: add initial device tree for TQMa8MPQL with i.MX8MP
arm64: dts: freescale: imx8qxp: Fix the keys node name
arm64: dts: freescale: imx8: Fix the system-controller node name
arm64: dts: freescale: imx8qxp: Fix the ocotp node name
arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controller
arm64: dts: freescale: imx8: Fix power controller name
arm64: dts: freescale: imx8qxp: Remove unnecessary clock related entries
arm64: dts: imx8mp: add NoC node
arm64: dts: Add SFP node for TA 3.0 devices
arm64: dts: layerscape: Add SFP node for TA 2.1 devices
arm64: dts: freescale: Add phyBOARD-Polis-i.MX8MM support
arm64: dts: imx8m{m,p}-verdin: use IT temperatures
arm64: dts: imx8mn-evk: add bt-sco sound card support
arm64: dts: imx8mq-evk: add bt-sco sound card support
arm64: dts: imx8mm-evk: add bt-sco sound card support
arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
arm64: dts: imx8mq: Pass a label to the AIPS nodes
arm64: dts: imx8m: Pass a label to the soc node
arm64: dts: imx8mm-venice-gw7902: fix UART1 CTS
arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2
...
Link: https://lore.kernel.org/r/20220709082951.15123-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt
TI K3 device tree updates for v5.20
* AM62: fixups, sa2ul enabled, ramoops for sk
* others: whitespace and gpio-key cleanup.
* tag 'ti-k3-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
arm64: dts: ti: k3-am62-main: Enable crypto accelerator
arm64: dts: ti: k3-am625-sk: Enable ramoops
arm64: dts: ti: k3-am642-sk: Add pinmux corresponding to main_uart0
arm64: dts: ti: Align gpio-key node names with dtschema
arm64: dts: ti: Adjust whitespace around '='
Link: https://lore.kernel.org/r/20220708232701.vpk45lwogpasaaay@enchilada
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.20-rc1
This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA)
as well as the Control BackBone related device tree nodes on Tegra194
and Tegra234.
Native timers are enabled on Tegra186, Tegra194 and Tegra234, which
allow keeping track of SoC-wide timestamps as well as hardware watchdog
functionality.
The audio subsystem is enhanced with the Output Processing Engine (OPE)
on Tegra210 and later.
Finally there are a handful of minor cleanups and fixes.
* tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Fix SDMMC1 CD on P2888
arm64: tegra: Update compatible for Tegra234 GPCDMA
arm64: tegra: Add Host1x and VIC on Tegra234
arm64: tegra: Add Host1x context stream IDs on Tegra186+
arm64: tegra: Enable native timers on Tegra234
arm64: tegra: Enable native timers on Tegra194
arm64: tegra: Enable native timers on Tegra186
arm64: tegra: Add node for CBB 2.0 on Tegra234
arm64: tegra: Add node for CBB 1.0 on Tegra194
arm64: tegra: Align gpio-keys node names with dtschema
arm64: tegra: Mark BPMP channels as no-memory-wc
arm64: tegra: Add Tegra234 GPCDMA device tree node
arm64: tegra: Adjust whitespace around '='
arm64: tegra: Enable OPE on various platforms
arm64: tegra: Add OPE device on Tegra210 and later
Link: https://lore.kernel.org/r/20220708185608.676474-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
- whitespace fixes
- replaced RTC indexes with constants
- gpio-key nodes aligned with dtschema
- fixed LED node for Orange Pi Win
- added OPP table for R40 CPU and thermal points
- updated I2C controller compatibles
- added compatibles for MBUS, D1 DE2 clocks, D1 USB
- enable internal HMIC bias on Pinephone
* tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: pinephone: Enable internal HMIC bias
dt-bindings: arm: sunxi: Add several MBUS compatibles
dt-bindings: arm: sunxi: Default to the full MBUS binding
dt-bindings: usb: generic-ohci: Add Allwinner D1 compatible
dt-bindings: usb: generic-ehci: Add Allwinner D1 compatible
dt-bindings: usb: sunxi-musb: Add Allwinner D1 compatible
arm64: dts: allwinner: a100: Update I2C controller fallback
dt-bindings: i2c: mv64xxx: Add variants with offload support
ARM: dts: sun8i-r40: Add thermal trip points/cooling maps
ARM: dts: sun8i-r40: add opp table for cpu
ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board
arm64: dts: allwinner: a64: orangepi-win: Fix LED node name
dt-bindings: clock: Add compatible for D1 DE2 clocks
ARM: dts: allwinner: align gpio-key node names with dtschema
arm64: dts: allwinner: align gpio-key node names with dtschema
arm64: dts: allwinner: Use constants for RTC clock indexes
ARM: dts: sunxi: Use constants for RTC clock indexes
ARM: dts: sun5i: adjust whitespace around '='
Link: https://lore.kernel.org/r/Ysh8qRH0Q5Xv9Qhf@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
Some fixes to follow DT spec.
MT6795:
- Big update of supported devices: cpu-map, L2 cache, PMU, watchdog,
MediaTek timer, Arm CCI, pincontroller
MT7622:
- Change WPS button to active low
MT8173:
- Add infracfg property to the IOMMU node (also for mt2712e)
- Add optional AXI clock to NOR Flash node
MT8183:
- add Medaitek CCI support
- add support for Smart Voltag Scaling (SVS)
- add GCE support to mutex
- Add panel default rotation to some chromebooks
- Add power supply to power domain so that SRAM for the GPU has power
MT8186:
- compatible added, DTS not yet ready.
MT8192:
- Add support for Acer Chromebook 514
MT8195:
- Add efuse node
- Enable USB wakeup support
- Add support for Acer Chromebook Spin 513
* tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (66 commits)
arm64: dts: mt8183: Add panel rotation
arm64: dts: mt7622: fix BPI-R64 WPS button
arm64: dts: mt8173: Fix nor_flash node
arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4
arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash
arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7
arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers
arm64: dts: mediatek: cherry: Enable I2C and SPI controllers
arm64: dts: mediatek: cherry: Document gpios and add default pin config
arm64: dts: mediatek: cherry: Add support for internal eMMC storage
arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC
arm64: dts: mediatek: cherry: Add platform regulators layout and config
arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato
dt-bindings: arm: mediatek: Add MT8195 Cherry Tomato Chromebooks
arm64: dts: mediatek: asurada: Add SPI NOR flash memory
arm64: dts: mediatek: asurada: Enable SCP
arm64: dts: mediatek: asurada: Enable MMC
arm64: dts: mediatek: asurada: Add SPMI regulators
arm64: dts: mediatek: asurada: Add MT6359 PMIC
arm64: dts: mediatek: asurada: Enable PCIe and add WiFi
...
Link: https://lore.kernel.org/r/b0d5b584-2693-73b3-79f6-3e2292f006ea@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.19, round 3:
- Fix GPIO property for imx6qdl-ts7970 board.
- Fix touchscreen pinctrl for imx6ull-colibri board by moving iomuxc-snvs
pin to the correct controller device.
- Fix SFP node of fsl-ls1028a to have a required clock property.
* tag 'imx-fixes-5.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: colibri-imx6ull: fix snvs pinmux group
ARM: dts: imx6qdl-ts7970: Fix ngpio typo and count
arm64: dts: ls1028a: Update SFP node to include clock
Link: https://lore.kernel.org/r/20220709032716.GA9868@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The X96 Mate is an Allwinner H616 based TV box, featuring:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 2GiB/4GiB RAM (fully usable!)
- 16/32/64GiB eMMC
- 100Mbps Ethernet (via embedded AC200 EPHY, not yet supported)
- Unsupported Allwinner WiFi chip
- 2 x USB 2.0 host ports
- HDMI port
- IR receiver
- 5V/2A DC power supply via barrel plug
Add a basic devicetree for it, with SD card and eMMC working, as
well as serial and the essential peripherals, like the AXP PMIC.
This DT is somewhat minimal, and should work on many other similar TV
boxes with the Allwinner H616 chip.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-8-andre.przywara@arm.com
|
|
The OrangePi Zero 2 is a development board with the new H616 SoC. It
comes with the following features:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 512MiB/1GiB DDR3 DRAM
- AXP305 PMIC
- Raspberry-Pi-1 compatible GPIO header
- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
- 1 USB 2.0 host port
- 1 USB 2.0 type C port (power supply + OTG)
- MicroSD slot
- on-board 2MiB bootable SPI NOR flash
- 1Gbps Ethernet port (via RTL8211F PHY)
- micro-HDMI port
- (yet) unsupported Allwinner WiFi/BT chip
Add the devicetree file describing the currently supported features.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-7-andre.przywara@arm.com
|
|
This (relatively) new SoC is similar to the H6, but drops the (broken)
PCIe support and the USB 3.0 controller. It also gets the management
controller removed, which in turn removes *some*, but not all of the
devices formerly dedicated to the ARISC (CPUS).
And while there is still the extra sunxi interrupt controller, the
package lacks the corresponding NMI pin, so no interrupts for the PMIC.
The reserved memory node is actually handled by Trusted Firmware now,
but U-Boot fails to propagate this to a separately loaded DTB, so we
keep it in here for now, until U-Boot learns to do this properly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-4-andre.przywara@arm.com
|
|
This adds support for TQMa8MPQL module on MBa8MPxL board.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Fix up the DP PHY node which had the wrong unit address.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708072556.4687-1-johan+linaro@kernel.org
|
|
Fix the usb_0 HS PHY reference clock which was mistakingly replaced with
the first usb_2 PHY clock.
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708072358.4583-1-johan+linaro@kernel.org
|
|
The recent commit that dropped the PCIe PHY clock index failed to update
the PCIe node reference.
Fixes: 531c738fb360 ("arm64: dts: qcom: sc7280: drop PCIe PHY clock index")
Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707064222.15717-1-johan+linaro@kernel.org
|
|
Add spin-table enable-method and cpu-release-addr properties for
cpu0 node. This is required by all ARMv8 SoC. Otherwise some
bootloader like u-boot can not update cpu-release-addr and linux
fails to start up secondary cpus.
Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
The cpu mask value in interrupt property inherits from bcm4908.dtsi
which sets to four cpus. Correct the value to two cpus for dual core
BCM4906 SoC.
Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
Revisions 1.0 and 1.1 of the PinePhone mainboard do not have an external
resistor connecting HBIAS to MIC2P. Enable the internal resistor to
provide the necessary headeset microphone bias.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220621035452.60272-4-samuel@sholland.org
|
|
Hook SDMMC1 CD up with CVM GPIO02 (SOC_GPIO11) used for card detection on J4
(uSD socket) on the carrier.
Fixes: ef633bfc21e9 ("arm64: tegra: Enable card detect for SD card on P2888")
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Use the compatible specific to Tegra234 for GPCDMA to support
additional features.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add device tree nodes for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add Host1x context stream IDs on systems that support Host1x context
isolation. Host1x and attached engines can use these stream IDs to
allow isolation between memory used by different processes.
The specified stream IDs must match those configured by the hypervisor,
if one is present.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra234.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra194.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Enable the native timers on Tegra186 chips to allow using the watchdog
functionality to recover from system hangs.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Tegra234 uses the Control Backbone (CBB) version 2.0. Add the nodes
that enable error handling from the various CBB 2.0 fabrics found on
Tegra234.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add device tree nodes to enable error handling on the Control Backbone
(CBB). Tegra194 uses CBB version 1.0.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
The Tegra SYSRAM contains regions access to which is restricted to
certain hardware blocks on the system, and speculative accesses to
those will cause issues.
Patch 'misc: sram: Only map reserved areas in Tegra SYSRAM' attempted
to resolve this by only mapping the regions specified in the device
tree on the assumption that there are no such restricted areas within
the 64K-aligned area of memory that contains the memory we wish to map.
Turns out this assumption is wrong, as there are such areas above the
4K pages described in the device trees. As such, we need to use the
bigger hammer that is no-memory-wc, which causes the memory to be
mapped as Device memory to which speculative accesses are disallowed.
As such, the previous patch in the series,
'firmware: tegra: bpmp: do only aligned access to IPC memory area',
is required with this patch to make the BPMP driver only issue aligned
memory accesses as those are also required with Device memory.
Fixes: fec29bf04994 ("misc: sram: Only map reserved areas in Tegra SYSRAM")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add device tree nodes for Tegra234 GPCDMA
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Enable OPE module usage on various Jetson platforms. This can be plugged
into an audio path using ALSA mixer controls. Add audio-graph-port binding
to use OPE device with generic audio-graph based sound card.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Output Processing Engine (OPE) is a client of AHUB and is present on
Tegra210 and later generations of Tegra SoC. Add this device on the
relevant SoC DTSI files.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
development board,
- AA1024XD12 panel overlay support for the Draak, Ebisu, and
Salvator-X(S) development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
ARM: dts: r9a06g032-rzn1d400-db: Add switch description
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
ARM: dts: r9a06g032: Describe switch
ARM: dts: r9a06g032: Describe GMAC2
ARM: dts: r9a06g032: Describe MII converter
arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
ARM: dts: renesas: Fix DA9063 watchdog subnode names
arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz
Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The proper name is 'keys', not 'scu-keys'.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The proper name is 'system-controller', not 'scu'.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The proper name is 'ocotp', not 'imx8qx-ocotp'.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Both i.MX8QM and i.MX8DXL use the fallback fsl,scu-clk compatible.
They rely on the same driver generic part as the i.MX8QXP, so
lets add it to i.MX8QXP too, for consitency.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The proper name is power-controller, not imx8qx-pd.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
XTAL clocks are not exposed by SCU to OS via OS<->SCU communication protocol,
so remove unnecessary entries.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|