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2022-05-05arm64: dt: imx8mn: support pwm polarity inversionMarkus Niebel
The i.MX8M Nano has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mm: support pwm polarity inversionMarkus Niebel
The i.MX8M Mini has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mq: support pwm polarity inversionMarkus Niebel
The i.MX8MQ has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7901: remove unnecessary cpu temp overrideTim Harvey
Remove the unnecessary cpu_alert0 and cpu_crit0 TMU node overrides as these are added dynamically by boot firmware based on CPU temperature grade. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7902: add vdd_5p0 ADC channelTim Harvey
Add missing vdd_5p0 ADC channel for the GW7902 boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8m*venice: add missing clock-names to pcie_phyTim Harvey
Define the missing clock-names property for the pcie_phy required by the fsl,imx8-pcie-phy dt bindings. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7902: fix pcie bindingsTim Harvey
Update the pcie bindings to the correct dt bindings: pcie_phy: - use pcie0_refclk - add required clock-names pcie: - remove pcie_phy clock as it comes from phy driver Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: freescale: reduce the interrup-map-maskMichael Walle
Reduce the interrupt-map-mask of the external interrupt controller to 0xf to align with the devicetree schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3Adam Ford
There is a header for a DB9 serial port, but any attempts to use hardware handshaking fail. Enable RTS and CTS pin muxing and enable handshaking in the uart node. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3Adam Ford
There is a header for a DB9 serial port, but any attempts to use hardware handshaking fail. Enable RTS and CTS pin muxing and enable handshaking in the uart node. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBCMarek Vasut
The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz to guarantee this I2C device can work correctly. Fixes: 583f24ae42a07 ("arm64: dts: imx8mm: Add support for Data Modul i.MX8M Mini eDM SBC") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm: Disable USB2 OC on Data Modul i.MX8M Mini eDM SBCMarek Vasut
The USB2 port has USB Hub permanently connected to it, disable OC to avoid getting false OC indication. Fixes: 583f24ae42a07 ("arm64: dts: imx8mm: Add support for Data Modul i.MX8M Mini eDM SBC") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm: Add CPLD on MX8Menlo boardMarek Vasut
The CPLD on MX8Menlo board is used to operate custom hardware, the CPLD content is compatible with previous M53Menlo CPLD, add the bindings. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mq-kontron-pitx-imx8m: Use the standard 'uart-has-rtscts'Fabio Estevam
The usage of the 'fsl,uart-has-rtscts' property is deprecated. Use the standard 'uart-has-rtscts' instead. Cc: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-By: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp-verdin: Use the standard 'uart-has-rtscts'Fabio Estevam
The usage of the 'fsl,uart-has-rtscts' property is deprecated. Use the standard 'uart-has-rtscts' instead. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add MEDIA_BLK_CTRLPaul Elder
Add a DT node for the MEDIA_BLK_CTRL, which provides power domains for the camera and display devices. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add MEDIAMIX power domainsLaurent Pinchart
Add the power domains related to the MEDIAMIX to the GPC. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: add HSIO power-domainsLucas Stach
This adds the GPC and HSIO blk-ctrl nodes providing power control for the high-speed (USB and PCIe) IOs. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter KitManoj Sai
Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Plus PCIe - MIPI CSI - 2x CAN - Audio Out i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. i.Core MX8M Plus needs to mount on top of this Evaluation board for creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoMManoj Sai
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. General features: - NXP i.MX8M Plus - Up to 4GB LDDR4 - 8 eMMC - Gigabit Ethernet - USB 3.0, 2.0 Host/OTG - PCIe 3.0 interface - I2S - LVDS - rest of i.MX8M Plus features i.Core MX8M Plus needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: freescale: update ifc node name to be memory-controllerLi Yang
Update the node name to be align with updated DT binding. But be noted that u-boot for ls1088a used the ifc node name to disable ifc-nor node when the SoC is configured to use QSPI. The u-boot has been updated to use the latest name but the change could break compatibility with older u-boot for ls1088a. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: remove "simple-bus" compatible from ifc nodeLi Yang
The binding of ifc device has been updated. Update dts to match accordingly. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-24arm64: dts: imx8mn-evk: Add UART3 supportFabio Estevam
UART3 pins are available in the J1003 connector. Add support for it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-24arm64: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo boardMarek Vasut
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo. The board is a compatible replacement for i.MX53 M53Menlo and features USB, multiple UARTs, ethernet, LEDs, SD and eMMC. Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Francesco Dolcini <francesco.dolcini@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts supportTim Harvey
The Gateworks GW7400 is an ARM based single board computer (SBC) featuring: - i.MX8M Plus SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (GSC) - QOS GbE - Microchip GbE Switch - Multiple multi-protocol RS232/RS485/RS422 Serial ports - USB 3.0 Front panel connector - onboard 802.11ac WiFi / BT - 3x miniPCIe socket with PCIe and USB 2.0 - 1x M.2 B/A-E socket with PCIe, USB 3.0 and dual nano-SIM sockets - off-board connectors for: MIPI DSI, MIPI CSI, SPI, GPIO, I2C - Wide range DC power input - Passive PoE - 802.3at PoE Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mm-evk: add pwm1/backlight supportTommaso Merciai
Add pwm1/backlight support nodes for imx8mm_evk board. Align with u-boot dts References: - https://patchwork.ozlabs.org/project/uboot/patch/20220326111911.13720-9-tommaso.merciai@amarulasolutions.com/ Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mn: add 8MNANOD3L-EVK device treeMichael Walle
Add a device tree for the 8MNANOD3L-EVK eval board which features an IMX8MN SoC. It is similar to the 8MNANODLPD4-EVK eval board except it has an IMX8MN UltraLite SoC and DDR3L memory. It esp. differs in the PMIC configuration because the SoC has a smaller package and thus the ARM core voltage is combined with the SoC voltage and the DDR voltage is 1.35V for the DDR3L memory. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8m{m,n}-venice-*: add missing uart-has-rtscts property to UARTsTim Harvey
Add the missing 'uart-has-rtscts' property to UART's that have hardware flow control capability. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: freescale: imx8q: add imx vpu codec entriesMing Qian
Add the Video Processing Unit node for IMX8Q SoC. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Shijie Qin <shijie.qin@nxp.com> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mp: Enable HS400-ESAdam Ford
The SDHC controller in the imx8mp has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mn: Enable HS400-ESAdam Ford
The SDHC controller in the imx8mn has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: freescale: add initial support for verdin imx8m plusMarcel Ziswiler
This patch adds the device tree to support Toradex Verdin iMX8M Plus [1] a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8M Plus family SoC (either i.MX 8M Plus Quad or 8M Plus QuadLite), a PCA9450C PMIC, a Gigabit Ethernet PHY, 1, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, an optional I2C temperature sensor plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The device tree for the Dahlia includes the module's device tree and enables the supported peripherals of the carrier board. The device tree for the Verdin Development Board includes the module's device tree as well as the Dahlia one as it is a superset and supports almost all peripherals available. So far there is no display functionality supported at all but basic console UART, USB host, eMMC and Ethernet functionality work fine. [1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mp: add uart2 dmaMarcel Ziswiler
Add DMA properties to uart2 node. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: freescale: align SPI NOR node name with dtschemaKrzysztof Kozlowski
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: lx2160a: Update can node propertyKuldeep Singh
fsl,clk-source property is of type uint8 and need to be defined as "/bits/ 8 <0>". Simply setting value to 0 raise warning: can@2180000: fsl,clk-source:0: [0, 0, 0, 0] is too long Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: ls1028a: default to OTG mode for USBMichael Walle
At the moment, the dtsi will force the dr_mode to host. This is problematic because it will always turn on the Vbus voltage regardless if the port is host or device. This might lead to a "shortcut" between the two USB endpoints because both might have their Vbus supplies enabled. Therefore, the default should be "otg" for any ports which aren't host only (from a SoC point of view) and have a user of the dtsi file overwrite that explicitly. Move the 'dr_mode = "host";' into the board dts. Now that the dtsi doesn't set the dr_mode anymore, we can also drop the 'dr_mode = "otg";' in the board dts because that is the default value if dr_mode is not set. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: ls1028a: sl28: use ocelot-8021q tagging by defaultMichael Walle
Enable the ocelot-8021q tagger by default which supports ethernet flow control. The new default is set in the common board dtsi. The actual switch node is enabled on a per board variant basis. Because of this we set the new tagger default for both internal ports and a particular variant is free to choose among the two port. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: add sd1 sleep pinctrlMarcel Ziswiler
Add SD1 sleep pinctrl to avoid backfeeding during sleep. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: note about disabled sd1 pull-upsMarcel Ziswiler
Add a note about us using discrete external on-module resistors pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly disabling the internal pull-ups due to ERR050080 [1]: IO: Degradation of internal IO pullup/pulldown current capability for IO’s continuously driven in a 3.3V operating mode [1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: capitalisation of verdin commentsMarcel Ziswiler
Fix capitalisation of Verdin in comments. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: re-order pinctrl groupsMarcel Ziswiler
Alphabetically re-order pinctrl groups. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: update iomux configurationMarcel Ziswiler
Update IOMUX configuration as required by the hardware design team. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: comment about i2c level shifterMarcel Ziswiler
Add a note about the bootloader being expected to switch on the I2C level shifter for the TLA2024 ADC behind this PMIC. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: only dashes in node namesMarcel Ziswiler
Make sure we only have dashes rather than underscores in node names by renaming ctrl_sleep_moci-hog to ctrl-sleep-moci-hog. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: alphabetically re-order nodesMarcel Ziswiler
Alphabetically re-order nodes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: multi-line comment styleMarcel Ziswiler
Fix multi-line comment style. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: update regulator namesMarcel Ziswiler
Annotate regulators which are on-module. Rename usb_otg{1/2}_vbus to USB_{1/2}_EN more in-line with Verdin spec. Annotate PMIC regulators with information on which BUCK/LDO they are on. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mpSherry Sun
i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mp: Add cpu-freq supportMarek Vasut
Add A53 OPP table and cpu regulator to support cpu-freq driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mp: Add missing speed grade phandleMarek Vasut
And missing speed grade phandle to cpu@0 node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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