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2025-07-21Merge tag 'mtk-dts64-for-v6.17' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt MediaTek ARM64 DeviceTree updates for v6.17 This adds new machines and improves support for already supported MediaTek SoCs. In particular: - New machine: MT8186 Steelix Squirtle Chromebook - Steelix-Voltorb's two dts are merged in one ...and improvements for already supported SoCs and machines: - Added reserved memory for AFE DMA for MT8173/83/86/92, aligning audio related memory allocation between all of the Chromebook SoCs - Added second source components for Steelix, and marked the multiple trackpads for Asurada as such - MediaTek Genio 1200: Enabled support for the Audio DSP and sound - MediaTek Genio 510/700/1200: Added support for the PMIC Keys - MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS - MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs - Airoha EN7581: Added ethernet nodes to Evaluation Board * tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: arm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support arm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci arm64: dts: mediatek: mt7988: add cci node dt-bindings: interconnect: add mt7988-cci compatible arm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board arm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe arm64: dts: mediatek: mt8186: Add Squirtle Chromebooks arm64: dts: mediatek: mt8186: Merge Voltorb device trees arm64: dts: mediatek: mt8186-steelix: Mark second source components for probing dt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks dt-bindings: arm: mediatek: Merge MT8186 Voltorb entries arm64: dts: mediatek: mt8395-genio-1200-evk: Enable Audio DSP and sound card arm64: dts: mediatek: mt8192-asurada: Reserve memory for audio frontend arm64: dts: mediatek: mt8186-corsola: Reserve memory for audio frontend arm64: dts: mediatek: mt8183-kukui: Reserve memory for audio frontend arm64: dts: mediatek: mt8173: Reserve memory for audio frontend Link: https://lore.kernel.org/r/20250711083656.33538-3-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21Merge tag 'stm32-dt-for-v6.17-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt STM32 DT for v6.17, round 1 Highlights: ---------- - MPU: - STM32MP13: -Add Ethernet MAC adress efuse support. - STMP32MP15: - Add stm32mp157f-DK2 board support. This board embedds the same conectivity devices, DDR ... than stm32mp157c-dk2. However there are two differences: STM32MP157F SoC which allows overdrive OPP and the SCMI support for system features like clocks and regulators. - STM32MP25: - Fix tick timer for low power use cases. - Add timer support. * tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: arm64: dts: st: remove empty line in stm32mp251.dtsi arm64: dts: st: fix timer used for ticks arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver ARM: dts: stm32: add stm32mp157f-dk2 board support dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx arm64: defconfig: enable STM32 timers drivers arm64: dts: st: add timer nodes on stm32mp257f-ev1 arm64: dts: st: add timer pins for stm32mp257f-ev1 arm64: dts: st: add timer nodes on stm32mp251 ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21Merge tag 'v6.17-rockchip-dts64-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T, Sakura Pi RK3308B - all of them have the used soc in their name. New overlays: RockPro64 screen, optional Sige5 Wifi/BT module, ethernet-switch addon for Jaguar. Added peripherals on rk3528 (spi, power-domain controller, gpu) and sdio controller on rk3576. DSI display support for the Gameforce-ACE handheld, a fix for the cover-detection (closed/open) on the PineNote, camera support for the Haikou Video Demo overlay on PX30 Ringneck as well as a number of other newly enabled peripherals on a number of boards. * tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (40 commits) arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7 arm64: dts: rockchip: enable PCIe on ROCK 4D arm64: dts: rockchip: Enable HDMI receiver on CM3588 arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576 arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576 arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC arm64: dts: rockchip: Enable GPU on Radxa E20C arm64: dts: rockchip: Add GPU node for RK3528 arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 Ringneck arm64: dts: rockchip: add label to first port of ISP on px30 arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISP arm64: dts: rockchip: Add power controller for RK3528 arm64: dts: rockchip: enable USB on Sige5 arm64: dts: rockchip: add overlay for the WiFi/BT module on Sige5 v1.2 arm64: dts: rockchip: add version-independent WiFi/BT nodes on Sige5 arm64: dts: rockchip: add SDIO controller on RK3576 arm64: dts: rockchip: Enable gpu on rk3576-evb1-v10 arm64: dts: rockchip: Update the PinePhone Pro panel description ... Link: https://lore.kernel.org/r/15465458.uLZWGnKmhe@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" nodeRob Herring (Arm)
The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have no CPU affinity. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21Merge tag 'renesas-dts-for-v6.17-tag2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.17 (take two) - Add support for the Renesas Gray Hawk Single board with R-Car V4M-7 (R8A779H2), - Add eMMC and microSD expansion board support for the RZ/V2H and RZ/V2N EVK development boards, - Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC Carrier-II EVK development board, - Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK development boards, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH arm64: dts: renesas: r9a09g057: Add XSPI node arm64: dts: renesas: r9a09g056: Add XSPI node arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1 arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support arm64: dts: renesas: Add Renesas R8A779H2 SoC support arm64: dts: renesas: Factor out Gray Hawk Single board support dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock Link: https://lore.kernel.org/r/cover.1752090401.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21Merge tag 'samsung-dt64-6.17' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.17 1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers, clock controllers and initial USB support. Add board using it: Samsung Galaxy S22+ (SM-S906B), called G0S. 2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes 3. Google GS101: - Prepare to switching to architected timer, instead of Exynos MCT as the primary one. - Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and charger. - Add incomplete description of the primary Samsung S2MPG10 PMIC. Several bits, like regulators, are still missing, though. - Add also secondary reboot-mode, via MAX77759 NVMEM. - Switch the primary (SoC) reboot handler to Google specific google,gs101-reboot which gives additional GS101 features (cold and warm reboots). This change will affect other users of this DTS, but to our knowledge there is only Android, from which this change originates. 4. Exynos7870: - Fix speed problems in USB gadget mode. - Correct memory map to avoid crashes due to secure world. * tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode arm64: dts: exynos: gs101: switch to gs101 specific reboot arm64: dts: exynos: gs101-pixel-common: add main PMIC node arm64: dts: exynos: gs101: ufs: add dma-coherent property arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC arm64: dts: exynos5433: Align i2c-gpio node names with dtschema arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes arm64: dts: exynosautov920: Add DT node for all SPI ports arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes MAINTAINERS: add entry for Samsung Exynos2200 SoC arm64: dts: exynos: add initial support for Samsung Galaxy S22+ arm64: dts: exynos: add initial support for exynos2200 SoC dt-bindings: arm: samsung: document g0s board binding Link: https://lore.kernel.org/r/20250709191523.171359-6-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21Merge tag 'v6.16-rc7' into usb-nextGreg Kroah-Hartman
We need the USB/Thunderbolt fixes in here for other patches to be on top of. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-19Add a new optional ",cma" suffix to the crashkernel= command line optionJiri Bohac
Patch series "kdump: crashkernel reservation from CMA", v5. This series implements a way to reserve additional crash kernel memory using CMA. Currently, all the memory for the crash kernel is not usable by the 1st (production) kernel. It is also unmapped so that it can't be corrupted by the fault that will eventually trigger the crash. This makes sense for the memory actually used by the kexec-loaded crash kernel image and initrd and the data prepared during the load (vmcoreinfo, ...). However, the reserved space needs to be much larger than that to provide enough run-time memory for the crash kernel and the kdump userspace. Estimating the amount of memory to reserve is difficult. Being too careful makes kdump likely to end in OOM, being too generous takes even more memory from the production system. Also, the reservation only allows reserving a single contiguous block (or two with the "low" suffix). I've seen systems where this fails because the physical memory is fragmented. By reserving additional crashkernel memory from CMA, the main crashkernel reservation can be just large enough to fit the kernel and initrd image, minimizing the memory taken away from the production system. Most of the run-time memory for the crash kernel will be memory previously available to userspace in the production system. As this memory is no longer wasted, the reservation can be done with a generous margin, making kdump more reliable. Kernel memory that we need to preserve for dumping is normally not allocated from CMA, unless it is explicitly allocated as movable. Currently this is only the case for memory ballooning and zswap. Such movable memory will be missing from the vmcore. User data is typically not dumped by makedumpfile. When dumping of user data is intended this new CMA reservation cannot be used. There are five patches in this series: The first adds a new ",cma" suffix to the recenly introduced generic crashkernel parsing code. parse_crashkernel() takes one more argument to store the cma reservation size. The second patch implements reserve_crashkernel_cma() which performs the reservation. If the requested size is not available in a single range, multiple smaller ranges will be reserved. The third patch updates Documentation/, explicitly mentioning the potential DMA corruption of the CMA-reserved memory. The fourth patch adds a short delay before booting the kdump kernel, allowing pending DMA transfers to finish. The fifth patch enables the functionality for x86 as a proof of concept. There are just three things every arch needs to do: - call reserve_crashkernel_cma() - include the CMA-reserved ranges in the physical memory map - exclude the CMA-reserved ranges from the memory available through /proc/vmcore by excluding them from the vmcoreinfo PT_LOAD ranges. Adding other architectures is easy and I can do that as soon as this series is merged. With this series applied, specifying crashkernel=100M craskhernel=1G,cma on the command line will make a standard crashkernel reservation of 100M, where kexec will load the kernel and initrd. An additional 1G will be reserved from CMA, still usable by the production system. The crash kernel will have 1.1G memory available. The 100M can be reliably predicted based on the size of the kernel and initrd. The new cma suffix is completely optional. When no crashkernel=size,cma is specified, everything works as before. This patch (of 5): Add a new cma_size parameter to parse_crashkernel(). When not NULL, call __parse_crashkernel to parse the CMA reservation size from "crashkernel=size,cma" and store it in cma_size. Set cma_size to NULL in all calls to parse_crashkernel(). Link: https://lkml.kernel.org/r/aEqnxxfLZMllMC8I@dwarf.suse.cz Link: https://lkml.kernel.org/r/aEqoQckgoTQNULnh@dwarf.suse.cz Signed-off-by: Jiri Bohac <jbohac@suse.cz> Cc: Baoquan He <bhe@redhat.com> Cc: Dave Young <dyoung@redhat.com> Cc: Donald Dutile <ddutile@redhat.com> Cc: Michal Hocko <mhocko@suse.cz> Cc: Philipp Rudo <prudo@redhat.com> Cc: Pingfan Liu <piliu@redhat.com> Cc: Tao Liu <ltao@redhat.com> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-07-18Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: "ARM: - Fix use of u64_replace_bits() in adjusting the guest's view of MDCR_EL2.HPMN RISC-V: - Fix an issue related to timer cleanup when exiting to user-space - Fix a race-condition in updating interrupts enabled for the guest when IMSIC is hardware-virtualized x86: - Reject KVM_SET_TSC_KHZ for guests with a protected TSC (currently only TDX) - Ensure struct kvm_tdx_capabilities fields that are not explicitly set by KVM are zeroed Documentation: - Explain how KVM contributions should be made testable - Fix a formatting goof in the TDX documentation" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: TDX: Don't report base TDVMCALLs KVM: VMX: Ensure unused kvm_tdx_capabilities fields are zeroed out KVM: Documentation: document how KVM is tested KVM: Documentation: minimal updates to review-checklist.rst KVM: x86: Reject KVM_SET_TSC_KHZ vCPU ioctl for TSC protected guest RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization RISC-V: KVM: Disable vstimecmp before exiting to user-space Documentation: KVM: Fix unexpected unindent warning KVM: arm64: Fix enforcement of upper bound on MDCR_EL2.HPMN
2025-07-18Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf after rc6Alexei Starovoitov
Cross-merge BPF and other fixes after downstream PR. No conflicts. Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-07-18Merge tag 'sunxi-fixes-for-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes Allwinner fixes for 6.16 Only one fix: Correct the name of the A523's EMAC0 to GMAC0, as seen in the SoC's datasheets. The matching DT binding change is in the net tree. * tag 'sunxi-fixes-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: a523: Rename emac0 to gmac0 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-17arm64/mm: Drop redundant addr increment in set_huge_pte_at()Anshuman Khandual
The 'addr' need not be incremented in the loop because that is not going to be used subsequently. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Dev Jain <dev.jain@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20250716035432.293682-1-anshuman.khandual@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2025-07-17arm64: Mark kernel as tainted on SAE and SError panicBreno Leitao
Set TAINT_MACHINE_CHECK when SError or Synchronous External Abort (SEA) interrupts trigger a panic to flag potential hardware faults. This tainting mechanism aids in debugging and enables correlation of hardware-related crashes in large-scale deployments. This change aligns with similar patches[1] that mark machine check events when the system crashes due to hardware errors. Link: https://lore.kernel.org/all/20250702-add_tain-v1-1-9187b10914b9@debian.org/ [1] Signed-off-by: Breno Leitao <leitao@debian.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20250716-vmcore_hw_error-v2-1-f187f7d62aba@debian.org Signed-off-by: Will Deacon <will@kernel.org>
2025-07-17arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5CDiederik de Haas
Both the R5S and R5C have a MASKROM button connected via saradc. For both the R5S as the R5C it's described on page 9 of their respective schematic, identified as 'Recovery'. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250716083355.327451-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-16bpf, arm64: remove structs on stack constraintAlexis Lothoré (eBPF Foundation)
While introducing support for 9+ arguments for tracing programs on ARM64, commit 9014cf56f13d ("bpf, arm64: Support up to 12 function arguments") has also introduced a constraint preventing BPF trampolines from being generated if the target function consumes a struct argument passed on stack, because of uncertainties around the exact struct location: if the struct has been marked as packed or with a custom alignment, this info is not reflected in BTF data, and so generated tracing trampolines could read the target function arguments at wrong offsets. This issue is not specific to ARM64: there has been an attempt (see [1]) to bring the same constraint to other architectures JIT compilers. But discussions following this attempt led to the move of this constraint out of the kernel (see [2]): instead of preventing the kernel from generating trampolines for those functions consuming structs on stack, it is simpler to just make sure that those functions with uncertain struct arguments location are not encoded in BTF information, and so that one can not even attempt to attach a tracing program to such function. The task is then deferred to pahole (see [3]). Now that the constraint is handled by pahole, remove it from the arm64 JIT compiler to keep it simple. [1] https://lore.kernel.org/bpf/20250613-deny_trampoline_structs_on_stack-v1-0-5be9211768c3@bootlin.com/ [2] https://lore.kernel.org/bpf/CAADnVQ+sj9XhscN9PdmTzjVa7Eif21noAUH3y1K6x5bWcL-5pg@mail.gmail.com/ [3] https://lore.kernel.org/bpf/20250707-btf_skip_structs_on_stack-v3-0-29569e086c12@bootlin.com/ Signed-off-by: Alexis Lothoré (eBPF Foundation) <alexis.lothore@bootlin.com> Link: https://lore.kernel.org/r/20250709-arm64_relax_jit_comp-v1-1-3850fe189092@bootlin.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-07-16arm64: cacheinfo: Provide helper to compress MPIDR value into u32James Morse
Filesystems like resctrl use the cache-id exposed via sysfs to identify groups of CPUs. The value is also used for PCIe cache steering tags. On DT platforms cache-id is not something that is described in the device-tree, but instead generated from the smallest MPIDR of the CPUs associated with that cache. The cache-id exposed to user-space has historically been 32 bits. MPIDR values may be larger than 32 bits. MPIDR only has 32 bits worth of affinity data, but the aff3 field lives above 32bits. The corresponding lower bits are masked out by MPIDR_HWID_BITMASK and contain an SMT flag and Uni-Processor flag. Swizzzle the aff3 field into the bottom 32 bits and using that. In case more affinity fields are added in the future, the upper RES0 area should be checked. Returning a value greater than 32 bits from this helper will cause the caller to give up on allocating cache-ids. Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Link: https://lore.kernel.org/r/20250711182743.30141-4-james.morse@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-15KVM: arm64: Tighten the definition of FEAT_PMUv3p9Marc Zyngier
The current definition of FEAT_PMUv3p9 doesn't check for the lack of an IMPDEF PMU, which is encoded as 0b1111, but considered unsigned. Use the recently introduced helper to address the issue (which is harmless, as KVM never advertises an IMPDEF PMU). Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714115503.3334242-6-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Convert MDCR_EL2 to config-driven sanitisationMarc Zyngier
As for other registers, convert the determination of the RES0 bits affecting MDCR_EL2 to be driven by a table extracted from the 2025-06 JSON drop Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714115503.3334242-5-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Convert SCTLR_EL1 to config-driven sanitisationMarc Zyngier
As for other registers, convert the determination of the RES0 bits affecting SCTLR_EL1 to be driven by a table extracted from the 2025-06 JSON drop Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714115503.3334242-4-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Convert TCR2_EL2 to config-driven sanitisationMarc Zyngier
As for other registers, convert the determination of the RES0 bits affecting TCR2_EL2 to be driven by a table extracted from the 2025-06 JSON drop. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714115503.3334242-3-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15arm64: sysreg: Add THE/ASID2 controls to TCR2_ELxMarc Zyngier
FEAT_THE and FEAT_ASID2 add new controls to the TCR2_ELx registers. Add them to the register descriptions. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714115503.3334242-2-maz@kernel.org [ fix whitespace ] Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Advertise FGT2 registers to userspaceMarc Zyngier
While a guest is able to use the FEAT_FGT2 registers, we're missing them being exposed to userspace. Add them to the (very long) list. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-9-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Condition FGT registers on feature availabilityMarc Zyngier
We shouldn't expose the FEAT_FGT registers unconditionally. Make them dependent on FEAT_FGT being actually advertised to the guest. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-8-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Expose GICv3 EL2 registers via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGSMarc Zyngier
Expose all the GICv3 EL2 registers through the usual GICv3 save/restore interface, making it possible for a VMM to access the EL2 state. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-7-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Let GICv3 save/restore honor visibility attributeMarc Zyngier
The GICv3 save/restore code never needed any visibility attribute, but that's about to change. Make vgic_v3_has_cpu_sysregs_attr() check the visibility in case a register is hidden. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-6-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Define helper for ICH_VTR_EL2Marc Zyngier
Move the computation of the ICH_VTR_EL2 value to a common location, so that it can be reused by the save/restore code. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-5-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Define constant value for ICC_SRE_EL2Marc Zyngier
Move the bag of bits defining the value of ICC_SRE_EL2 to a common spot so that it can be reused by the save/restore code. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-4-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Don't advertise ICH_*_EL2 registers through GET_ONE_REGMarc Zyngier
It appears that exposing the GICv3 EL2 registers through the usual sysreg interface is not consistent with the way we expose the EL1 registers. The latter are exposed via the GICv3 device interface instead, and there is no reason why the EL2 registers should get a different treatement. Hide the registers from userspace until the GICv3 code grows the required infrastructure. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-3-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Make RVBAR_EL2 accesses UNDEFMarc Zyngier
We always expose a virtual CPU that has EL3 when NV is enabled, irrespective of EL3 being actually implemented in HW. Therefore, as per the architecture, RVBAR_EL2 must UNDEF, since EL2 is not the highest implemented exception level. This is consistent with RMR_EL2 also triggering an UNDEF. Adjust the handling of RVBAR_EL2 accordingly. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250714122634.3334816-2-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15KVM: arm64: Commit exceptions from KVM_SET_VCPU_EVENTS immediatelyOliver Upton
syzkaller has found that it can trip a warning in KVM's exception emulation infrastructure by repeatedly injecting exceptions into the guest. While it's unlikely that a reasonable VMM will do this, further investigation of the issue reveals that KVM can potentially discard the "pending" SEA state. While the handling of KVM_GET_VCPU_EVENTS presumes that userspace-injected SEAs are realized immediately, in reality the emulated exception entry is deferred until the next call to KVM_RUN. Hack-a-fix the immediate issues by committing the pending exceptions to the vCPU's architectural state immediately in KVM_SET_VCPU_EVENTS. This is no different to the way KVM-injected exceptions are handled in KVM_RUN where we potentially call __kvm_adjust_pc() before returning to userspace. Reported-by: syzbot+4e09b1432de3774b86ae@syzkaller.appspotmail.com Reported-by: syzbot+1f6f096afda6f4f8f565@syzkaller.appspotmail.com Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-15arm64: dts: rockchip: Drop regulator-compatible property on rk3399Diederik de Haas
The regulator-compatible property has never existed in the regulator/fcs,fan53555.yaml binding, so drop it. This fixes the following DTB validation warnings: Unevaluated properties are not allowed ('regulator-compatible' was unexpected) Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-11-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Drop unneeded address+size-cells on px30Diederik de Haas
On nodes with compatible "rockchip,px30-usb2phy-grf", the #address-cells and #size-cells are required and consequently their child nodes should have unit addresses. That is not the case for the px30-pmugrf and px30-grf nodes, so remove them there. This fixes the following DTB validation warnings: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-10-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2Diederik de Haas
The MIPI DSI connector on the PineTab2 only has 1 port with 1 endpoint, so drop the unit-address properties. While at it, move 'rotation' property to its proper sorting position. This fixes the following DTB validation warnings: node has a unit name, but no reg or ranges property Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-9-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtsoDiederik de Haas
According to the DTS coding style [1] referenced nodes should be sorted alpha-numerically so move mipi_out to be after mipi_in_panel. [1] https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#order-of-nodes Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250709132323.128757-8-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtsoDiederik de Haas
The only thing actually added here is a single endpoint on mipi_out, which is already defined in rk3399-base.dtsi, so it's simpler to just reference that phandle, which allows the removal of several properties. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-7-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boardsDiederik de Haas
The only thing actually added here is a single endpoint on edp_out, which is already defined in rk3399-base.dtsi, so it's simpler to just reference that phandle, which allows the removal of several properties. This fixes the following DTB validation warnings: graph node has single child node 'endpoint@0', #address-cells/#size-cells are not necessary Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-6-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Simplify VOP port definition on rk3328Diederik de Haas
When there's only 1 endpoint, there is no need for a unit-address and removing that allows removing of related properties as well. This fixes the following DTB validation warnings: graph node has single child node 'endpoint@0', #address-cells/#size-cells are not necessary Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-5-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15Merge tag 'kvmarm-fixes-6.16-6' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 6.16, take #6 - Fix use of u64_replace_bits() in adjusting the guest's view of MDCR_EL2.HPMN.
2025-07-15arm64: smp: Fix pNMI setup after GICv5 reworkMarc Zyngier
Breno reports that pNMIs are not behaving the way they should since they were reworked for GICv5. Turns out we feed the IRQ number to the pNMI helper instead of the IPI number -- not a good idea. Fix it by providing the correct number (duh). Fixes: ba1004f861d16 ("arm64: smp: Support non-SGIs for IPIs") Reported-by: Breno Leitao <leitao@debian.org> Suggested-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-07-15Merge tag 'soc-fixes-6.16-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "There are 18 devicetree fixes for three arm64 plaforms: Qualcomm Snapdragon, Rockchips and NXP i.MX. These get updated to more correctly describe the hardware, fixing issues with: - real-time clock on Snapdragon based laptops - SD card detection, PCI probing and HDMI/DDC communication on Rockchips - ethernet and SPI probing on certain i.MX based boards - a regression with the i.MX watchdog Aside from the devicetree fixes, there are two additional fixes for the merged ASPEED LPC snoop driver that saw some changes in 6.16, and one additional driver enabled in arm64 defconfig to fix CPU frequency scaling" * tag 'soc-fixes-6.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits) arm64: dts: freescale: imx8mm-verdin: Keep LDO5 always on soc: aspeed: lpc-snoop: Don't disable channels that aren't enabled soc: aspeed: lpc-snoop: Cleanup resources in stack-order arm64: dts: imx95: Correct the DMA interrupter number of pcie0_ep arm64: dts: rockchip: Add missing fan-supply to rk3566-quartz64-a arm64: dts: rockchip: use cs-gpios for spi1 on ringneck arm64: dts: add big-endian property back into watchdog node arm64: dts: imx95-15x15-evk: fix the overshoot issue of NETC arm64: dts: imx95-19x19-evk: fix the overshoot issue of NETC arm64: dts: rockchip: list all CPU supplies on ArmSoM Sige5 arm64: dts: imx8mp-venice-gw74xx: fix TPM SPI frequency arm64: dts: imx8mp-venice-gw73xx: fix TPM SPI frequency arm64: dts: imx8mp-venice-gw72xx: fix TPM SPI frequency arm64: dts: imx8mp-venice-gw71xx: fix TPM SPI frequency arm64: dts: qcom: x1e80100: describe uefi rtc offset arm64: dts: qcom: sc8280xp-x13s: describe uefi rtc offset arm64: defconfig: Enable Qualcomm CPUCP mailbox driver arm64: dts: rockchip: Add cd-gpios for sdcard detect on Cool Pi 4B arm64: dts: rockchip: Add cd-gpios for sdcard detect on Cool Pi CM5 arm64: dts: rockchip: Adjust the HDMI DDC IO driver strength for rk3588 ...
2025-07-15arm64: dts: allwinner: a523: enable Mali GPU for all boardsMikhail Kalashnikov
All devices based on the A523/A527/H728/T527 processors contain a G57 MC1 GPU. Enable the DT nodes for this GPU and specify a regulator that supplies power to the SoC's VDD_GPU pins. The other parameters are set in the SoC dtsi, so are board independent. Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250711035730.17507-4-iuncuim@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-15arm64: dts: allwinner: a523: add Mali GPU nodeMikhail Kalashnikov
The Allwinner A523 SoC features the Mali-G57 MC1 GPU, which belongs to the Mali Valhall (v9) family. There is a power domain specifically for this GPU that needs to be enabled to utilize it. To enable in a specific device, we need to enable the gpu node and specify the “mali-supply” regulator additionally in the device tree. Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250711035730.17507-3-iuncuim@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-15arm64: dts: allwinner: a523: Add power controller device nodesChen-Yu Tsai
The A523 SoC family has two power controllers, one based on the existing PPU, and one newer one based on ARM's PCK-600. Add device nodes for both of them. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250712074021.805953-6-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-15Merge branch 'dt' of ↵Chen-Yu Tsai
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm into sunxi/dt-for-6.17 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-15arm64/gcs: Don't call gcs_free() when releasing task_structMark Brown
Currently we call gcs_free() when releasing task_struct but this is redundant, it attempts to deallocate any kernel managed userspace GCS which should no longer be relevant and resets values in the struct we're in the process of freeing. By the time arch_release_task_struct() is called the mm will have been disassociated from the task so the check for a mm in gcs_free() will always be false, for threads that are exiting leaving the mm active deactivate_mm() will have been called previously and freed any kernel managed GCS. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250714-arm64-gcs-release-task-v2-1-8a83cadfc846@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2025-07-15arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boardsDiederik de Haas
The #address-cells and #size-cells properties are not useful on the DSI controller node; they are only useful/required on ports and panel(s). So remove them from the controller node and add them where actually needed on the various rk3399 based boards. This fixes the following DTB validation warnings: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-3-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boardsDiederik de Haas
The #address-cells and #size-cells properties are not useful on the DSI controller node; they are only useful/required on ports and panel(s). So remove them from the controller node and add them where actually needed on the various px30 based boards, which includes rk3326. This fixes the following DTB validation warnings: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250709132323.128757-2-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Fix UART DMA support for RK3528Jonas Karlman
Trying to use UART2 DMA for Bluetooth on ArmSoM Sige1 result in tx timeout when using dma-names = "tx", "rx" as required by the dt-binding: Bluetooth: hci0: command 0x0c03 tx timeout Bluetooth: hci0: BCM: Reset failed (-110) Change the dmas order to fix UART DMA support on RK3528. With this fixed Bluetooth can be loaded using DMA on ArmSoM Sige1: Bluetooth: hci0: BCM: chip id 159 Bluetooth: hci0: BCM: features 0x0f Bluetooth: hci0: BCM4362A2 Bluetooth: hci0: BCM4362A2 (000.017.017) build 0000 Bluetooth: hci0: BCM4362A2 'brcm/BCM4362A2.hcd' Patch Bluetooth: hci0: BCM: features 0x0f Bluetooth: hci0: BCM43752A2 UART 37.4MHz Ampak AP6398 sLNA iLNA CL1 [Version: 1091.1173] Bluetooth: hci0: BCM4362A2 (000.017.017) build 1173 Fixes: ab6fcb58aedf ("arm64: dts: rockchip: Add UART DMA support for RK3528") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250709210831.3170458-1-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Add reset button to NanoPi R5SDiederik de Haas
The NanoPi R5S LTS version has a reset button, which is connected via GPIO. Note that the non-LTS version does not have the reset button and therefore on page 19 of the schematic version 2204 it is marked 'NC', but it is connected on the LTS version. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250711142138.197445-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-15arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5CDiederik de Haas
The RTC_HCTOSYS_DEVICE module defaults to rtc0 and should (highly) preferable be assigned to a battery backed RTC module as it is used to (re)initialize the system clock. The R5S and R5C have a connector for a RTC battery which is used by HYM8563 RTC. Both devices also have another RTC from the rk809 PMIC. To make sure the HYM8563 is always assigned rtc0, add an alias for it. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250713161723.270963-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>