| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-01-30 | RISC-V: Limit the scope of TLB shootdowns | Andrew Waterman |
| 2018-01-07 | riscv: remove CONFIG_MMU ifdefs | Christoph Hellwig |
| 2017-12-01 | RISC-V: User-Visible Changes | Palmer Dabbelt |
| 2017-11-30 | RISC-V: Flush I$ when making a dirty page executable | Andrew Waterman |
| 2017-11-28 | RISC-V: `sfence.vma` orderes the instruction cache | Palmer Dabbelt |
| 2017-09-26 | RISC-V: Atomic and Locking Code | Palmer Dabbelt |
 |
index : linux-arm.git | |
| Russell King's ARM Linux kernel tree | Russell King |
| summaryrefslogtreecommitdiff |