Age | Commit message (Expand) | Author |
---|---|---|
2020-08-20 | RISC-V: Remove CLINT related code from timer and arch | Anup Patel |
2020-08-20 | RISC-V: Add mechanism to provide custom IPI operations | Anup Patel |
2019-11-17 | riscv: provide native clint access for M-mode | Christoph Hellwig |