| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-02-20 | RISC-V: Enable IRQ during exception handling | zongbox@gmail.com |
| 2018-01-30 | riscv: disable SUM in the exception handler | Christoph Hellwig |
| 2018-01-07 | riscv: rename SR_* constants to match the spec | Christoph Hellwig |
| 2017-09-26 | RISC-V: Task implementation | Palmer Dabbelt |
 |
index : linux-arm.git | |
| Russell King's ARM Linux kernel tree | Russell King |
| summaryrefslogtreecommitdiff |