index
:
linux-arm.git
aarch64/hotplug-vcpu/head
aarch64/hotplug-vcpu/v6.5
aarch64/hotplug-vcpu/v6.6
aarch64/hotplug-vcpu/v6.6-rc1
aarch64/hotplug-vcpu/v6.6-rc5
aarch64/hotplug-vcpu/v6.6-rc6
aarch64/hotplug-vcpu/v6.6-rc7
aarch64/hotplug-vcpu/v6.7
aarch64/hotplug-vcpu/v6.7-rc1
aarch64/hotplug-vcpu/v6.7-rc2
aarch64/hotplug-vcpu/v6.7-rc3
aarch64/hotplug-vcpu/v6.7-rc4
aarch64/hotplug-vcpu/v6.7-rc5
aarch64/hotplug-vcpu/v6.8-rc2
aarch64/ktext/head
aarch64/ktext/v6.5
aarch64/ktext/v6.6-rc5
aarch64/ktext/v6.7
adfs
cex7
clearfog
clearfog-4.10
clearfog-4.11
clearfog-4.12
clearfog-4.13
clearfog-4.9
clkdev
csi-v6
devel-stable
drm-armada-devel
drm-armada-devel-4.15
drm-armada-fixes
drm-armada-fixes-4.15
drm-dwhdmi-devel
drm-etnaviv-devel
drm-tda9950-fixes
drm-tda998x-devel
drm-tda998x-fixes
fec-testing
fiq
fixes
fixes-sa1111
for-arm-soc
for-next
hb2
ktext
ktext-current
master
mcbin
mvneta
mvpp2
net-merged
net-next
net-queue
nmi
phy
rtc
sa1100
spectre
to-build
uaccess
vcpu-rmk
wl18xx
zii
Russell King's ARM Linux kernel tree
Russell King
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
kernel
/
module.c
Age
Commit message (
Expand
)
Author
2023-01-31
riscv: module: Add ADD16 and SUB16 rela types
Andrew Jones
2023-01-31
riscv: module: move find_section to module.h
Jisheng Zhang
2022-05-11
riscv: implement module alternatives
Heiko Stuebner
2022-03-31
RISC-V: module: fix apply_r_riscv_rcv_branch_rela typo
Wu Caize
2022-03-10
riscv: Fix auipc+jalr relocation range checks
Emil Renner Berthing
2021-04-26
riscv: module: Create module allocations without exec permissions
Jisheng Zhang
2021-04-26
riscv: Move kernel mapping outside of linear mapping
Alexandre Ghiti
2020-07-30
riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs
Emil Renner Berthing
2020-06-09
mm: introduce include/linux/pgtable.h
Mike Rapoport
2020-03-03
riscv: avoid the PIC offset of static percpu data in module beyond 2G limits
Vincent Chen
2019-10-18
riscv: Use pr_warn instead of pr_warning
Kefeng Wang
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
2019-03-28
RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)
Joe Perches
2018-11-12
RISC-V: Silence some module warnings on 32-bit
Olof Johansson
2018-07-04
RISC-V: Fix the rv32i kernel build
Palmer Dabbelt
2018-07-04
RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations
Andreas Schwab
2018-07-04
RISC-V: Change variable type for 32-bit compatible
Zong Li
2018-06-11
RISC-V: Handle R_RISCV_32 in modules
Andreas Schwab
2018-04-02
RISC-V: Support SUB32 relocation type in kernel module
Zong Li
2018-04-02
RISC-V: Support ADD32 relocation type in kernel module
Zong Li
2018-04-02
RISC-V: Support ALIGN relocation type in kernel module
Zong Li
2018-04-02
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
Zong Li
2018-04-02
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
Zong Li
2018-04-02
RISC-V: Support CALL relocation type in kernel module
Zong Li
2018-04-02
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
Zong Li
2017-09-26
RISC-V: User-facing API
Palmer Dabbelt