linux-arm.git - Russell King's ARM Linux kernel tree

Age	Commit message (Expand)	Author
2024-03-20	riscv: Only flush the mm icache when setting an exec pte	Alexandre Ghiti
2023-10-26	RISC-V: cacheflush: Initialize CBO variables on ACPI systems	Sunil V L
2023-08-24	riscv: implement the new page table range API	Matthew Wilcox (Oracle)
2023-07-06	riscv: mm: mark CBO relate initialization funcs as __init	Jisheng Zhang
2023-04-28	Merge tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2023-04-08	RISC-V: Use IPIs for remote icache flush when possible	Anup Patel
2023-03-14	RISC-V: Add Zicboz detection and block size parsing	Andrew Jones
2023-03-14	RISC-V: Factor out body of riscv_init_cbom_blocksize loop	Andrew Jones
2023-02-09	riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte	Guo Ren
2022-12-09	Merge patch series "RISC-V: Ensure Zicbom has a valid block size"	Palmer Dabbelt
2022-12-02	riscv/mm: hugepage's PG_dcache_clean flag is only set in head page	Tong Tiangen
2022-10-21	RISC-V: Fix compilation without RISCV_ISA_ZICBOM	Andrew Jones
2022-01-20	RISC-V: Do not use cpumask data structure for hartid bitmap	Atish Patra
2021-10-04	riscv: Flush current cpu icache before other cpus	Alexandre Ghiti
2020-06-09	mm: reorder includes after introduction of linux/pgtable.h	Mike Rapoport
2020-06-09	mm: introduce include/linux/pgtable.h	Mike Rapoport
2019-12-27	riscv: export flush_icache_all to modules	Olof Johansson
2019-11-17	riscv: add nommu support	Christoph Hellwig
2019-11-13	riscv: implement remote sfence.i using IPIs	Christoph Hellwig
2019-09-05	riscv: cleanup riscv_cpuid_to_hartid_mask	Christoph Hellwig
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner
2019-05-16	riscv: move flush_icache_{all,mm} to cacheflush.c	Gary Guo
2017-11-30	RISC-V: Flush I$ when making a dirty page executable	Andrew Waterman