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path: root/arch/x86/events/perf_event.h
AgeCommit message (Expand)Author
2021-04-19perf/x86: Register hybrid PMUsKan Liang
2021-04-19perf/x86: Factor out x86_pmu_show_pmu_capKan Liang
2021-04-19perf/x86: Hybrid PMU support for extra_regsKan Liang
2021-04-19perf/x86: Hybrid PMU support for event constraintsKan Liang
2021-04-19perf/x86: Hybrid PMU support for hardware cache eventKan Liang
2021-04-19perf/x86: Hybrid PMU support for unconstrainedKan Liang
2021-04-19perf/x86: Hybrid PMU support for countersKan Liang
2021-04-19perf/x86: Hybrid PMU support for intel_ctrlKan Liang
2021-04-19perf/x86/intel: Hybrid PMU support for perf capabilitiesKan Liang
2021-04-19perf/x86: Track pmu in per-CPU cpu_hw_eventsKan Liang
2021-04-16perf/x86: Move cpuc->running into P4 specific codeKan Liang
2021-02-01perf/x86/intel: Support CPUID 10.ECX to disable fixed countersKan Liang
2021-02-01perf/x86/intel: Add perf core PMU support for Sapphire RapidsKan Liang
2021-02-01perf/x86/intel: Filter unsupported Topdown metrics eventKan Liang
2021-01-27perf/intel: Remove Perfmon-v4 counter_freezing supportPeter Zijlstra
2020-11-26Merge remote-tracking branch 'origin/master' into perf/corePeter Zijlstra
2020-11-09perf/x86/intel: Make anythread filter support conditionalStephane Eranian
2020-11-09perf/x86: Reduce stack usage for x86_pmu::drain_pebs()Peter Zijlstra
2020-10-29perf/core: Add support for PERF_SAMPLE_CODE_PAGE_SIZEStephane Eranian
2020-10-06perf/x86: Fix n_metric for cancelled txnPeter Zijlstra
2020-10-06perf/x86: Fix n_pair for cancelled txnPeter Zijlstra
2020-08-18perf/x86/intel: Support TopDown metrics on Ice LakeKan Liang
2020-08-18perf/x86/intel: Generic support for hardware TopDown metricsKan Liang
2020-08-18perf/x86/intel: Fix the name of perf METRICSKan Liang
2020-07-08perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang
2020-07-08perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang
2020-07-08perf/x86/intel/lbr: Support Architectural LBRKan Liang
2020-07-08perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang
2020-07-08perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang
2020-07-08perf/x86/intel/lbr: Support LBR_CTLKan Liang
2020-07-08perf/x86: Expose CPUID enumeration bits for arch LBRKan Liang
2020-07-08perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang
2020-07-08perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang
2020-07-08perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang
2020-07-02perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu
2020-07-02perf/x86: Add constraint to create guest LBR event without hw counterLike Xu
2020-07-02perf/x86: Fix variable types for LBR registersWei Wang
2020-04-30x86/perf: Add hardware performance events support for Zhaoxin CPU.CodyYao-oc
2020-01-17perf/x86/amd: Add support for Large Increment per Cycle EventsKim Phillips
2020-01-17perf/x86/amd: Constrain Large Increment per Cycle eventsKim Phillips
2019-10-28perf/x86/intel: Implement LBR callstack context synchronizationAlexey Budankov
2019-10-28perf/core, perf/x86: Introduce swap_task_ctx() method at 'struct pmu'Alexey Budankov
2019-08-28perf/x86/intel: Support PEBS output to PTAlexander Shishkin
2019-07-08Merge tag 'v5.2' into perf/core, to pick up fixesIngo Molnar
2019-06-24perf/x86: Remove pmu->pebs_no_xmm_regsKan Liang
2019-06-24perf/x86: Clean up PEBS_XMM_REGSKan Liang
2019-06-03perf/x86: Use update attribute groups for default attributesJiri Olsa
2019-06-03perf/x86: Use update attribute groups for capsJiri Olsa
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