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path: root/drivers/clk/hisilicon/clk-hi6220.c
AgeCommit message (Expand)Author
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner
2017-11-01clk: hi6220: mark clock cs_atb_syspll as criticalLeo Yan
2017-08-31clk: hi6220: change watchdog clock sourceLeo Yan
2017-06-19clk: hi6220: add acpu clockZhangfei Gao
2017-04-12clk: hi6220: add debug APB clockLeo Yan
2016-10-17clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock initShawn Guo
2016-07-06clk: hi6220: Change syspll and media_syspll clk to 1.19GHzXinliang Liu
2016-06-30clk: hi6220: Add RTC clock for pl031Zhangfei Gao
2016-03-02clk: hisilicon: Remove CLK_IS_ROOTStephen Boyd
2015-06-03clk: hi6220: Clock driver support for Hisilicon hi6220 SoCBintian Wang