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path: root/drivers/clk/tegra
AgeCommit message (Expand)Author
2023-07-04clk: tegra: Avoid calling an uninitialized functionThierry Reding
2023-06-26Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', 'cl...Stephen Boyd
2023-06-14clk: tegra: tegra124-emc: Fix potential memory leakYuan Can
2023-06-08clk: tegra: super: Switch to determine_rateMaxime Ripard
2023-06-08clk: tegra: periph: Switch to determine_rateMaxime Ripard
2023-06-08clk: tegra: periph: Add a determine_rate hookMaxime Ripard
2023-06-08clk: tegra: super: Add a determine_rate hookMaxime Ripard
2023-06-08clk: tegra: bpmp: Add a determine_rate hookMaxime Ripard
2023-04-25Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-nextStephen Boyd
2023-03-29clk: tegra20: fix gcc-7 constant overflow warningArnd Bergmann
2023-03-28clk: tegra: Convert to platform remove callback returning voidUwe Kleine-König
2023-03-28clk: tegra: Don't warn three times about failure to unregisterUwe Kleine-König
2022-11-19clk: tegra: Support BPMP-FW ABI deny flagsPeter De Schrijver
2022-10-14clk: tegra: Fix Tegra PWM parent clockJon Hunter
2022-10-04Merge branches 'clk-ofnode', 'clk-bindings', 'clk-cleanup', 'clk-zynq' and 'c...Stephen Boyd
2022-08-22clk: tegra20: Fix refcount leak in tegra20_clock_initMiaoqian Lin
2022-08-22clk: tegra: Fix refcount leak in tegra114_clock_initMiaoqian Lin
2022-08-22clk: tegra: Fix refcount leak in tegra210_clock_initMiaoqian Lin
2022-08-22clk: move from strlcpy with unused retval to strscpyWolfram Sang
2022-08-19clk: tegra: Add missing of_node_put()Liang He
2022-05-06clk: tegra: Update kerneldoc to match prototypesThierry Reding
2022-05-04clk: tegra: Replace .round_rate() with .determine_rate()Rajkumar Kasirajan
2022-05-04clk: tegra: Register clocks from root to leafTimo Alho
2022-05-04clk: tegra: Add missing reset deassertionDiogo Ivo
2022-03-11clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driverMiaoqian Lin
2021-12-15clk: tegra: Support runtime PM and power domainDmitry Osipenko
2021-12-15clk: tegra: Make vde a child of pll_p on tegra114Dmitry Osipenko
2021-09-02Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2021-08-29clk: tegra: fix old-style declarationArnd Bergmann
2021-08-11clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clockDmitry Osipenko
2021-07-27clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_opsDmitry Osipenko
2021-06-25clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulatorAlexandru Ardelean
2021-06-02clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()Yang Yingliang
2021-05-31clk: tegra: Don't deassert reset on enabling clocksDmitry Osipenko
2021-05-31clk: tegra: Mark external clocks as not having reset controlDmitry Osipenko
2021-05-31clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttlingDmitry Osipenko
2021-05-31clk: tegra: Don't allow zero clock rate for PLLsDmitry Osipenko
2021-05-31clk: tegra: Halve SCLK rate on Tegra20Dmitry Osipenko
2021-05-31clk: tegra: Ensure that PLLU configuration is applied properlyDmitry Osipenko
2021-05-31clk: tegra: Fix refcounting of gate clocksDmitry Osipenko
2021-05-31clk: tegra30: Use 300MHz for video decoder by defaultDmitry Osipenko
2021-03-24clk: tegra: Don't enable PLLE HW sequencer at initJC Kuo
2021-03-24clk: tegra: Add PLLE HW power sequencer controlJC Kuo
2021-02-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2021-02-20Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds
2021-02-11clk: tegra: cvb: Provide missing description for 'tegra_cvb_add_opp_table()'s...Lee Jones
2021-02-11clk: tegra: clk-tegra30: Remove unused variable 'reg'Lee Jones
2021-01-12clk: tegra30: Add hda clock default rates to clock driverPeter Geis
2021-01-05memory: tegra124-emc: Make driver modularDmitry Osipenko
2020-12-21Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
generated by cgit (git 2.34.1) at 2025-04-08 02:58:32 +0000