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path: root/drivers/clk/zte
AgeCommit message (Expand)Author
2019-08-16clk: zx296718: Don't reference clk_init_data after registrationStephen Boyd
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner
2017-12-21clk: move clock common macros out from vendor directoriesChunyan Zhang
2017-08-30clk: zte: constify clk_div_tableArvind Yadav
2017-06-19clk: zx296718: export I2S mux clocksShawn Guo
2017-04-12clk: zte: Mark pll config tables as constStephen Boyd
2017-04-12clk: zte: add pll_vga clock for zx296718Shawn Guo
2017-04-12clk: zte: pd_bit is not 0 on zx296718Shawn Guo
2017-04-12clk: zte: set CLK_SET_RATE_PARENT for a few zx296718 clocksShawn Guo
2017-02-10clk: zte: add i2s clocks for zx296718Baoyou Xie
2017-01-09clk: zte: add audio clocks for zx296718Jun Nie
2017-01-09clk: zx296718: do not panic on failureShawn Guo
2016-09-23clk: zx296718: register driver earlier with core_initcallShawn Guo
2016-09-16clk: zx: fix pointer case warningsArnd Bergmann
2016-09-16clk: zx296718: use builtin_platform_driver to simplify the codeWei Yongjun
2016-09-14clk: zx: register ZX296718 clocksJun Nie
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie
2016-04-15clk: zte: Remove CLK_IS_ROOTStephen Boyd
2015-07-28clk: zx: Constify parent names in clock init dataJun Nie
2015-07-28clk: zx: Add audio and GPIO clock for zx296702Jun Nie
2015-07-28clk: zx: Add audio div clock method for zx296702Jun Nie
2015-06-11clk: zx: add clock support to zx296702Jun Nie