Age | Commit message (Expand) | Author |
---|---|---|
2022-07-19 | cxl/port: Read CDAT table | Ira Weiny |
2022-07-09 | cxl/core: Drop ->platform_res attribute for root decoders | Dan Williams |
2022-05-20 | cxl/port: Enable HDM Capability after validating DVSEC Ranges | Dan Williams |
2022-05-19 | cxl/port: Reuse 'struct cxl_hdm' context for hdm init | Dan Williams |
2022-05-19 | cxl/pci: Drop @info argument to cxl_hdm_decode_init() | Dan Williams |
2022-05-19 | cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init() | Dan Williams |
2022-05-19 | cxl/mem: Skip range enumeration if mem_enable clear | Dan Williams |
2022-05-19 | cxl/mem: Consolidate CXL DVSEC Range enumeration in the core | Dan Williams |
2022-05-19 | cxl/pci: Move cxl_await_media_ready() to the core | Dan Williams |
2022-02-08 | cxl/core/port: Remove @host argument for dport + decoder enumeration | Dan Williams |
2022-02-08 | cxl/port: Add a driver for 'struct cxl_port' objects | Ben Widawsky |
2022-02-08 | cxl/core: Generalize dport enumeration in the core | Dan Williams |