summaryrefslogtreecommitdiff
path: root/drivers/cxl/core/port.c
AgeCommit message (Expand)Author
2023-04-30Merge tag 'cxl-for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds
2023-04-27Merge tag 'driver-core-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2023-04-18cxl/core: Drop unused io-64-nonatomic-lo-hi.hDan Williams
2023-04-04cxl/port: Fix find_cxl_root() for RCDs and simplify itDan Williams
2023-03-23driver core: bus: mark the struct bus_type for sysfs callbacks as constantGreg Kroah-Hartman
2023-02-25Merge tag 'cxl-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds
2023-02-10Merge branch 'for-6.3/cxl-ram-region' into cxl/nextDan Williams
2023-02-10cxl/dax: Create dax devices for CXL RAM regionsDan Williams
2023-02-10tools/testing/cxl: Define a fixed volatile configuration to parseDan Williams
2023-02-10cxl/region: Add region autodiscoveryDan Williams
2023-02-10cxl/region: Add volatile region creation supportDan Williams
2023-02-10cxl/region: Add a mode attribute for regionsDan Williams
2023-02-10cxl/memdev: Fix endpoint port removalDan Williams
2023-01-27driver core: make struct bus_type.uevent() take a const *Greg Kroah-Hartman
2023-01-26cxl: fix spelling mistakesRandy Dunlap
2023-01-25cxl/port: Link the 'parent_dport' in portX/ and endpointX/ sysfsDan Williams
2022-12-05Merge branch 'for-6.2/cxl-xor' into for-6.2/cxlDan Williams
2022-12-05Merge branch 'for-6.2/cxl-aer' into for-6.2/cxlDan Williams
2022-12-05cxl/port: Add RCD endpoint port enumerationDan Williams
2022-12-05cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_memDan Williams
2022-12-03cxl/acpi: Support CXL XOR Interleave Math (CXIMS)Alison Schofield
2022-12-03cxl/core/regs: Make cxl_map_{component, device}_regs() device genericDan Williams
2022-12-03cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter
2022-12-02cxl/acpi: Move rescan to the workqueueDan Williams
2022-11-14cxl: Unify debug messages when calling devm_cxl_add_dport()Robert Richter
2022-11-14cxl: Unify debug messages when calling devm_cxl_add_port()Robert Richter
2022-11-04cxl/region: Fix 'distance' calculation with passthrough portsDan Williams
2022-08-01cxl/region: Delete 'region' attribute from root decodersDan Williams
2022-07-26cxl/region: Introduce cxl_pmem_region objectsDan Williams
2022-07-26cxl/region: Add region driver boiler plateDan Williams
2022-07-25cxl/hdm: Commit decoder state to hardwareDan Williams
2022-07-25cxl/region: Program target listsDan Williams
2022-07-25cxl/region: Attach endpoint decodersDan Williams
2022-07-25cxl/acpi: Add a host-bridge index lookup mechanismDan Williams
2022-07-25cxl/region: Enable the assignment of endpoint decoders to regionsDan Williams
2022-07-21cxl/region: Add region creation supportBen Widawsky
2022-07-21cxl/mem: Enumerate port targets before adding endpointsDan Williams
2022-07-21cxl/hdm: Add sysfs attributes for interleave ways + granularityBen Widawsky
2022-07-21cxl/port: Move dport tracking to an xarrayDan Williams
2022-07-21cxl/port: Move 'cxl_ep' references to an xarray per portDan Williams
2022-07-21cxl/port: Record parent dport when adding portsDan Williams
2022-07-21cxl/port: Record dport in endpoint referencesDan Williams
2022-07-21cxl/hdm: Add support for allocating DPA to an endpoint decoderDan Williams
2022-07-21cxl/hdm: Track next decoder to allocateDan Williams
2022-07-21cxl/hdm: Add 'mode' attribute to decoder objectsDan Williams
2022-07-21cxl/core: Define a 'struct cxl_endpoint_decoder'Dan Williams
2022-07-21cxl/core: Define a 'struct cxl_root_decoder'Dan Williams
2022-07-21cxl/core: Define a 'struct cxl_switch_decoder'Dan Williams
2022-07-10cxl/port: Cache CXL host bridge dataDan Williams
2022-07-10cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem'Dan Williams