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path: root/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
AgeCommit message (Expand)Author
2019-07-18drm/amd/display: refactor dump_clk_registersSu Sung Chung
2019-05-31drm/amd/display: make clk mgr soc specificEric Yang
2019-04-03drm/amd/display: Fix multi-thread writing to 1 stateAidan Wood
2019-03-19drm/amd/display: fix up reference clock abstractionsJun Lei
2019-01-14drm/amd/display: fix compliler errors [-Werror,-Wmissing-braces]Shirish S
2019-01-14drm/amd/display/dcn10_hw_sequencer_debug: Remove duplicate headerBrajeswar Ghosh
2019-01-14drm/amd/display: Use 100 Hz precision for pipe pixel clocksKen Chalmers
2019-01-14drm/amd/display: Add pixel clock values to dtn logsFatemeh Darbehani
2019-01-14drm/amd/display: Fix runtime errors for diagnostic testsEric Bernstein
2018-11-30drm/amd/display: Clean up for DCN1 clock debug loggingFatemeh Darbehani
2018-11-19drm/amd/display: make underflow status clear explicitJun Lei
2018-09-10drm/amd/display: Add invariant support instrumentation in driverJun Lei
2018-09-10drm/amd/display: Add driver-side parsing for CMJun Lei
2018-08-27drm/amd/display: implement DPMS DTN test v2Jun Lei
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