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path: root/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
AgeCommit message (Expand)Author
2023-11-29drm/amd/display: Refactor OPTC into component folderParandhaman K
2023-06-15drm/amd/display: Clean up dcn10_optc.c kdocSrinivasan Shanmugam
2023-06-09drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+Aurabindo Pillai
2023-06-09drm/amd/display: Clean FPGA code in dcQingqing Zhuo
2022-10-24drm/amd/display: Add events log to trace OPTC lock and unlockRodrigo Siqueira
2022-10-10drm/amd/display: Drop uncessary OTG lock checkRodrigo Siqueira
2022-10-10drm/amd/display: Use set_vtotal_min_max to configure OTG VTOTALRodrigo Siqueira
2022-10-06drm/amd/display: Remove OPTC lock checkRodrigo Siqueira
2022-09-19drm/amd/display: log vertical interrupt 1 for debugJosip Pavic
2022-08-16drm/amd/display: Fix comment typomin tang
2022-08-16drm/amd/display: Expand documentation for timingRodrigo Siqueira
2022-08-16drm/amd/display: Add basic kernel doc to CRC code under DCRodrigo Siqueira
2022-08-10drm/amd/display: clear optc underflow before turn off odm clockFudong Wang
2022-06-14drm/amd/display: FVA timing adjustmentCharlene Liu
2021-12-13drm/amd/display: fix function scopesIsabella Basso
2021-09-28drm/amd/display: Add an extra check for dcn10 OPTC data formatOliver Logush
2021-07-21drm/amd/display: log additional register state for debugJosip Pavic
2021-06-08drm/amd/display: Return last used DRR VTOTAL from DCJayendran Ramani
2021-06-04drm/amd/display: Add DCN3.1 OPTCNicholas Kazlauskas
2021-04-09drm/amd/display: Move vupdate keepout programming from DCN20 to DCN10Leo Li
2021-01-13drm/amd/display: enable HUBP blank behaviourBhawanpreet Lakha
2020-12-15drm/amd/display: delay fp2 programming until vactive before lockMartin Leung
2020-12-15drm/amd/display: HP Reverb G2 VR fails to light upAric Cyr
2020-11-04drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher
2020-10-05drm/amd/display: Fix OPTC_DATA_FORMAT programmingDmytro Laktyushkin
2020-07-01drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0Alex Deucher
2020-07-01drm/amd/display: Add DCN3 OPTCBhawanpreet Lakha
2020-04-09drm/amd/display: Revert to old formula in set_vtg_paramsAlvin Lee
2020-03-31drm/amd/display: Use double buffered DRR timing update by defaultNicholas Kazlauskas
2020-03-09drm/amd/display: writing stereo polarity register if swappedMartin Leung
2020-03-05drm/amd/display: change number of cursor policy for dml calculation.Yongqiang Sun
2020-01-16drm/amd/display: make PSR static screen entry within 30 msAnthony Koo
2019-11-13drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTEDBhawanpreet Lakha
2019-11-13drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guardsNicholas Kazlauskas
2019-11-13drm/amd/display: Add DMUB support to DCNicholas Kazlauskas
2019-10-10drm/amd/display: add more checks to validate seamless boot timingMartin Leung
2019-08-23drm/amd/display: Expose OTG_V_TOTAL_MID for HW DiagsBayan Zabihiyan
2019-08-23drm/amd/display: fix trigger not generated for freesyncYogesh Mohan Marimuthu
2019-08-15drm/amd/display: Add enum for H-timing divider modeQingqing Zhuo
2019-08-15drm/amd/display: update optc odm interface for more than 2 oppsDmytro Laktyushkin
2019-06-22drm/amd/display: do not need otg lock if otg is not activehersen wu
2019-06-22drm/amd/display: Add DSC support for Navi (v2)Harry Wentland
2019-05-31drm/amd/display: Ensure DRR triggers in BPEryk Brol
2019-05-24drm/amd/display: Program VTG params after programming Global SyncJoshua Aberback
2019-05-24drm/amd/display: stop external access to internal optc sync paramsDmytro Laktyushkin
2019-05-24drm/amd/display: move signal type out of otg dlg paramsDmytro Laktyushkin
2019-02-19drm/amd/display: Refactor for setup periodic interrupt.Yongqiang Sun
2019-02-06drm/amd/display: add n_vid_mul and half pix_rate for odmDmytro Laktyushkin
2019-02-06drm/amd/display: refactor out programming of vupdate interruptAnthony Koo
2019-02-06drm/amd/display: interface to check if timing can be seamlessAnthony Koo
generated by cgit (git 2.34.1) at 2024-05-26 20:33:12 +0000