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path: root/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
AgeCommit message (Expand)Author
2024-03-27drm/amd/display: Remove read/write to external registerSung Joon Kim
2024-01-09drm/amd/display: To adjust dprefclk by down spread percentageMartin Tsai
2023-12-19drm/amd/display: Add function for dumping clk registersJohnson Chen
2023-09-26drm/amd/display: Improve x86 and dmub ips handshakeDuncan Ma
2023-09-20drm/amd/display: Add IPS control flagSung Joon Kim
2023-09-11drm/amd/display: fix some non-initialized register mask and settingCharlene Liu
2023-08-30drm/amd/display: Add DCN35 CLK_MGRQingqing Zhuo
2023-06-23drm/amd/display: Enable dc mode clock switching for DCN32xAlvin Lee
2023-06-09drm/amd/display: Filter out AC mode frequencies on DC mode systemsAustin Zheng
2023-04-11drm/amd/display: On clock init, maintain DISPCLK freqAlvin Lee
2022-10-10drm/amd/display: Acquire FCLK DPM levels on DCN32Dillon Varone
2022-09-13drm/amd/display: Correct dram channel width for dcn314Duncan Ma
2022-06-30drm/amd/display: Fix __floatunsidf undefined for 32 bit compilationRodrigo Siqueira
2022-06-21drm/amd/display: Get VCO frequency from registersRodrigo Siqueira
2022-06-03drm/amd/display: add CLKMGR changes for DCN32/321Aurabindo Pillai
2022-06-01drm/amd/display: revert Blank eDP on disable/enable drvLeung, Martin
2022-04-25drm/amd/display: update dcn315 clk table readDmytro Laktyushkin
2021-12-14drm/amd/display: implement dc_mode_memclkMartin Leung
2021-06-22drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCNAlex Deucher
2021-06-04drm/amd/display: Add DCN3.1 clock manager supportNicholas Kazlauskas
2021-04-09drm/amd/display: Disable MALL when SMU not presentChris Park
2021-04-09drm/amd/display: hide VGH asic specific structsDmytro Laktyushkin
2020-11-04drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher
2020-10-05drm/amd/display: Add dcn3.01 support to DC (v2)Roman Li
2020-08-26drm/amd/display: Send DISPLAY_OFF after power down on bootSung Lee
2020-07-08drm/amd/display: Request PHYCLK adjustment on PHY enable/disableJoshua Aberback
2020-07-01drm/amd/display: add support for per-state dummy-pstate latencyJun Lei
2020-07-01drm/amd/display: Add DCN3 CLK_MGRBhawanpreet Lakha
2020-02-06drm/amd/display: Add wm ranges to clk_mgrSung Lee
2019-12-05drm/amd/display: fix dprefclk and ss percentage reading on RNEric Yang
2019-12-05drm/amd/display: update sr and pstate latencies for RenoirEric Yang
2019-11-13drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flagBhawanpreet Lakha
2019-10-25drm/amd/display: move wm ranges reporting to end of init hwEric Yang
2019-10-25drm/amd/display: move dispclk vco freq to clk mgr baseDmytro Laktyushkin
2019-10-10drm/amd/display: add renoir specific watermark range and clk helperDmytro Laktyushkin
2019-10-10drm/amd/display: exit PSR during detectionEric Yang
2019-10-10drm/amd/display: add explicit comparator as default optimization checkJun Lei
2019-08-29drm/amd/display: Add Renoir clock managerBhawanpreet Lakha
2019-07-18drm/amd/display: add set and get clock for testing purposesCharlene Liu
2019-06-20drm/amd/display: Fix null-deref on vega20 with xgmiRoman Li
2019-05-31drm/amd/display: Refactor clk_mgr functionsEric Yang
2019-05-31drm/amd/display: make clk mgr soc specificEric Yang
2019-05-24drm/amd/display: Set dispclk and dprefclock directlyEric Yang
2019-03-27drm/amd/display: Create clock funcsEryk Brol
2018-11-05drm/amd/display: rename dccg to clk_mgrDmytro Laktyushkin
generated by cgit (git 2.34.1) at 2024-05-21 19:18:34 +0000