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path: root/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
AgeCommit message (Expand)Author
2024-05-03drm/i915/xe2hpd: Add new C20 PHY SRAM addressBalasubramani Vivekanandan
2024-01-30drm/i915/xe2lpd: Move registers to PICALucas De Marchi
2023-09-18drm/i915/cx0: Add step for programming msgbus timerGustavo Sousa
2023-09-06drm/i915/cx0: Check and increase msgbus timeout thresholdGustavo Sousa
2023-05-19drm/i915/hdmi: C20 computed PLL frequenciesClint Taylor
2023-04-28drm/i915/mtl: Add voltage swing sequence for C20Mika Kahola
2023-04-28drm/i915/mtl: C20 port clock calculationMika Kahola
2023-04-28drm/i915/mtl: C20 HW readoutMika Kahola
2023-04-28drm/i915/mtl: C20 PLL programmingMika Kahola
2023-04-14drm/i915/mtl: Add C10 phy programming for HDMIRadhakrishna Sripada
2023-04-14drm/i915/mtl/display: Implement DisplayPort sequencesJosé Roberto de Souza
2023-04-14drm/i915/mtl: Add vswing programming for C10 physMika Kahola
2023-04-14drm/i915/mtl: Add Support for C10 PHY message bus and pll programmingRadhakrishna Sripada
2023-04-14drm/i915/mtl: Create separate reg file for PICA registersMika Kahola
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