summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
AgeCommit message (Expand)Author
2021-05-05drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä
2021-04-28drm/i915/display: move crtc and dpll declarations where they belongJani Nikula
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi
2021-04-14drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper
2021-03-23drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper
2021-03-19drm/i915/display: Fix a typoBhaskar Chowdhury
2021-03-08drm/i915: Use pipes instead crtc indices in PLL state trackingVille Syrjälä
2021-03-08drm/i915: Do intel_dpll_readout_hw_state() after encoder readoutVille Syrjälä
2021-01-26drm/i915/adl_s: Configure DPLL for ADL-SAditya Swarup
2020-12-03Merge tag 'drm-intel-next-queued-2020-11-27' of git://anongit.freedesktop.org...Dave Airlie
2020-11-16drm: fix some kernel-doc markupsMauro Carvalho Chehab
2020-11-16drm/i915: Use actual readout results for .get_freq()Ville Syrjälä
2020-11-16drm/i915: Introduce intel_dpll_get_hw_state()Ville Syrjälä
2020-11-05drm/i915/ehl: Implement W/A 22010492432Tejas Upadhyay
2020-10-15drm/i915/dg1: Enable DPLL for DG1Lucas De Marchi
2020-10-15drm/i915/dg1: Add and setup DPLLs for DG1Aditya Swarup
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay
2020-10-06drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clockImre Deak
2020-10-06drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programmingImre Deak
2020-09-15drm/i915/pll: Centralize PLL_ENABLE register lookupAnusha Srivatsa
2020-09-08Merge tag 'v5.9-rc4' into drm-nextDave Airlie
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
2020-08-17drm/i915/rkl: Handle HTIMatt Roper
2020-08-17drm/i915/rkl: Add DPLL4 supportMatt Roper
2020-07-01drm/i915/icl+: Simplify combo/TBT PLL calculation call-chainImre Deak
2020-07-01drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clockImre Deak
2020-04-21drm/i915/display/dpll_mgr: Prefer drm_WARN_ON over WARN_ONPankaj Bharadiya
2020-03-09drm/i915: Fix documentation for intel_dpll_get_freq()Imre Deak
2020-03-02drm/i915: Unify the DPLL ref clock frequency trackingImre Deak
2020-03-02drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out againImre Deak
2020-03-02drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculationImre Deak
2020-03-02drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculationImre Deak
2020-03-02drm/i915/hsw: Split out the SPLL parameter calculationImre Deak
2020-03-02drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLLImre Deak
2020-03-02drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding itImre Deak
2020-03-02drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.cImre Deak
2020-03-02drm/i915: Move the DPLL vfunc inits after the func definesImre Deak
2020-03-02drm/i915: Keep the global DPLL state in a DPLL specific structImre Deak
2020-03-02drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.cImre Deak
2020-03-02drm/i915: Fix bounds check in intel_get_shared_dpll_id()Imre Deak
2020-02-11drm/i915/dpll_mgr: convert to drm_device based logging macros.Wambui Karuga
2020-02-04drm/i915/display/dpll_mgr: Make WARN* drm specific where drm_device ptr is av...Pankaj Bharadiya
2020-01-27drm/i915/dpll_mgr: use intel_de_*() functions for register accessJani Nikula
2020-01-13drm/i915: Pass intel_encoder to enc_to_*()Ville Syrjälä
2019-11-01drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.Maarten Lankhorst
2019-10-25drm/i915: Fix PCH reference clock for FDI on HSW/BDWVille Syrjälä
2019-10-09drm/i915: Select DPLL's via maskMatt Roper
2019-10-04drm/i915/tgl: Add the Thunderbolt PLL divider valuesImre Deak
2019-09-27drm/i915/tgl: Fix dkl link trainingJosé Roberto de Souza
2019-09-25drm/i915/tgl: Add dkl phy pll calculationsJosé Roberto de Souza
generated by cgit (git 2.34.1) at 2025-04-28 17:54:03 +0000