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path: root/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
AgeCommit message (Expand)Author
2022-04-25drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock()Ville Syrjälä
2022-04-25drm/i915: Pass dev_priv to intel_shared_dpll_init()Ville Syrjälä
2022-04-25drm/i915: Make .get_dplls() return intVille Syrjälä
2022-03-10drm/i915: Replace hand rolled bxt vco calculation with chv_calc_dpll_params()Ville Syrjälä
2022-03-10drm/i915: Replace bxt_clk_div with struct dpllVille Syrjälä
2022-03-10drm/i915: Store the m2 divider as a whole in bxt_clk_divVille Syrjälä
2022-03-10drm/i915: Clean up bxt/glk PLL registersVille Syrjälä
2022-03-04drm/i915: Use designated initializers for bxt_dp_clk_val[]Ville Syrjälä
2022-03-04drm/i915: Remove bxt m2_frac_enVille Syrjälä
2022-03-04drm/i915: Clean up some struct/array initializersVille Syrjälä
2022-03-04drm/i915: Move a bunch of stuff into rodata from the stackVille Syrjälä
2022-03-04drm/i915: Nuke skl_wrpll_context_init()Ville Syrjälä
2022-03-02drm/i915: Use str_on_off()Lucas De Marchi
2022-02-18drm/i915/display/tgl+: Implement new PLL programming stepJosé Roberto de Souza
2022-01-19drm/i915/dpll: make intel_shared_dpll_funcs internal to intel_dpll_mgr.cJani Nikula
2022-01-11drm/i915: Move TC PHY registers to their own headerMatt Roper
2021-10-20drm/i915/display: Rename POWER_DOMAIN_DPLL_DC_OFF to POWER_DOMAIN_DC_OFFJosé Roberto de Souza
2021-10-19drm/i915: Move PCH refclock stuff into its own fileVille Syrjälä
2021-09-29drm/i915/tc: Add/use helpers to retrieve TypeC port propertiesImre Deak
2021-08-25drm/i915: Nuke intel_prepare_shared_dpll()Ville Syrjälä
2021-08-25drm/i915: Fold ibx_pch_dpll_prepare() into ibx_pch_dpll_enable()Ville Syrjälä
2021-08-12Merge tag 'drm-intel-next-2021-08-10-1' of git://anongit.freedesktop.org/drm/...Dave Airlie
2021-08-03drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabledImre Deak
2021-07-30drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.cLucas De Marchi
2021-07-22drm/i915/dg2: Skip shared DPLL handlingMatt Roper
2021-07-14Merge branch 'topic/revid_steppings' into drm-intel-gt-nextMatt Roper
2021-07-14drm/i915/jsl_ehl: Use revid->stepping tablesMatt Roper
2021-06-15drm/i915/adl_p: Add initial ADL_P WorkaroundsClint Taylor
2021-05-19drm/i915/adl_p: Add PLL SupportAnusha Srivatsa
2021-05-05drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä
2021-04-28drm/i915/display: move crtc and dpll declarations where they belongJani Nikula
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi
2021-04-14drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper
2021-03-23drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper
2021-03-19drm/i915/display: Fix a typoBhaskar Chowdhury
2021-03-08drm/i915: Use pipes instead crtc indices in PLL state trackingVille Syrjälä
2021-03-08drm/i915: Do intel_dpll_readout_hw_state() after encoder readoutVille Syrjälä
2021-01-26drm/i915/adl_s: Configure DPLL for ADL-SAditya Swarup
2020-12-03Merge tag 'drm-intel-next-queued-2020-11-27' of git://anongit.freedesktop.org...Dave Airlie
2020-11-16drm: fix some kernel-doc markupsMauro Carvalho Chehab
2020-11-16drm/i915: Use actual readout results for .get_freq()Ville Syrjälä
2020-11-16drm/i915: Introduce intel_dpll_get_hw_state()Ville Syrjälä
2020-11-05drm/i915/ehl: Implement W/A 22010492432Tejas Upadhyay
2020-10-15drm/i915/dg1: Enable DPLL for DG1Lucas De Marchi
2020-10-15drm/i915/dg1: Add and setup DPLLs for DG1Aditya Swarup
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay
2020-10-06drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clockImre Deak
2020-10-06drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programmingImre Deak
2020-09-15drm/i915/pll: Centralize PLL_ENABLE register lookupAnusha Srivatsa
2020-09-08Merge tag 'v5.9-rc4' into drm-nextDave Airlie
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