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path: root/drivers/gpu/drm/i915/display
AgeCommit message (Expand)Author
2022-05-27drm/i915/display/adl_p: Updates to HDMI combo PHY voltage swing tableBalasubramani Vivekanandan
2022-05-25drm/i915/dg2: Support 4k@30 on HDMIVandita Kulkarni
2022-05-24drm/i915: fix typos in commentsJulia Lawall
2022-05-23drm/i915/d12+: Disable DMC firmware flip queue handlersImre Deak
2022-05-23drm/i915: Rename block_size()/block_offset()Ville Syrjälä
2022-05-23drm/i915/dsi: fix VBT send packet port selection for ICL+Jani Nikula
2022-05-20drm/i915/pcode: Extend pcode functions for multiple gt'sAshutosh Dixit
2022-05-16drm/i915: Ensure damage clip area is within pipe areaJouni Högander
2022-05-16drm/i915/psr: Use full update In case of area calculation failsJouni Högander
2022-05-13drm/i915/audio: fix audio code enable/disable pipe loggingJani Nikula
2022-05-12drm/i915/dmc: Add MMIO range restrictionsAnusha Srivatsa
2022-05-12drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.cImre Deak
2022-05-12drm/i915/dmc: Load DMC on DG2Anusha Srivatsa
2022-05-05drm/i915: Respect VBT seamless DRRS min refresh rateVille Syrjälä
2022-05-05drm/i915/bios: Parse the seamless DRRS min refresh rateVille Syrjälä
2022-05-05drm/i915/bios: Refactor panel_type codeVille Syrjälä
2022-05-05drm/i915/bios: Extract get_panel_type()Ville Syrjälä
2022-05-05drm/i915/bios: Assume panel_type==0 if the VBT has bogus dataVille Syrjälä
2022-05-05drm/i915/bios: Document the mess around the LFP data tablesVille Syrjälä
2022-05-05drm/i915/bios: Get access to the tail end of the LFP data blockVille Syrjälä
2022-05-05drm/i915/bios: Generate LFP data table pointers if the VBT lacks themVille Syrjälä
2022-05-05drm/i915/bios: Reorder panel DTD parsingVille Syrjälä
2022-05-05drm/i915: Use drm_mode_init() for on-stack modesVille Syrjälä
2022-05-04drm/i915: warn about missing ->get_buf_trans initializationJani Nikula
2022-05-02drm/i915: move tons of power well initializers to rodataJani Nikula
2022-04-27drm/i915/dp: Add workaround for spurious AUX timeouts/hotplugs on LTTPR linksImre Deak
2022-04-26Merge drm/drm-next into drm-intel-nextJani Nikula
2022-04-25drm/i915: Add crtc .crtc_get_shared_dpll()Ville Syrjälä
2022-04-25drm/i915: Split out dg2_crtc_compute_clock()Ville Syrjälä
2022-04-25drm/i915: Clear the dpll_hw_state when disabling a pipeVille Syrjälä
2022-04-25drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock()Ville Syrjälä
2022-04-25drm/i915: Move stuff into intel_dpll_crtc_compute_clock()Ville Syrjälä
2022-04-25drm/i915: Adjust .crtc_compute_clock() calling conventionVille Syrjälä
2022-04-25drm/i915: Remove pointless dpll_funcs checksVille Syrjälä
2022-04-25drm/i915: Pass dev_priv to intel_shared_dpll_init()Ville Syrjälä
2022-04-25drm/i915: Make .get_dplls() return intVille Syrjälä
2022-04-25drm/i915/fbc: s/false/0/Ville Syrjälä
2022-04-25drm/i915/fbc: Consult hw.crtc instead of uapi.crtcVille Syrjälä
2022-04-21drm/i915: Check EDID for HDR static metadata when choosing blcJouni Högander
2022-04-20drm/i915: Fixup merge of the power well refactor patchsetImre Deak
2022-04-20drm/i915: Remove the XELPD specific AUX and DDI power domainsImre Deak
2022-04-20drm/i915: Remove duplicate DDI/AUX power domain mappingsImre Deak
2022-04-20drm/i915: Remove the ICL specific TBT power domainsImre Deak
2022-04-20drm/i915: Remove the aliasing of power domain enum valuesImre Deak
2022-04-20drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platformImre Deak
2022-04-20drm/i915: Sanitize the ADL-S power well definitionImre Deak
2022-04-20drm/i915: Simplify the DG1 power well descriptorsImre Deak
2022-04-20drm/i915: Allow platforms to share power well descriptorsImre Deak
2022-04-20drm/i915: Simplify power well definitions by adding power well instancesImre Deak
2022-04-20drm/i915: Convert the u64 power well domains mask to a bitmapImre Deak
generated by cgit (git 2.34.1) at 2025-04-08 15:38:51 +0000