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path: root/drivers/gpu/drm/i915/display
AgeCommit message (Expand)Author
2022-12-06drm/i915: Wrap all access to i915_vma.node.start|sizeChris Wilson
2022-12-06drm/i915: Limit the display memory alignment to 32 bit instead of 64Andi Shyti
2022-11-04Merge tag 'drm-intel-gt-next-2022-11-03' of git://anongit.freedesktop.org/drm...Dave Airlie
2022-11-01Merge tag 'drm-intel-next-2022-10-28' of git://anongit.freedesktop.org/drm/dr...Dave Airlie
2022-10-28drm/i915/sdvo: Fix debug printVille Syrjälä
2022-10-28drm/i915/sdvo: Reduce copy-pasta in output setupVille Syrjälä
2022-10-28drm/i915/sdvo: Get rid of the output type<->device index stuffVille Syrjälä
2022-10-28drm/i915/sdvo: Don't add DDC modes for LVDSVille Syrjälä
2022-10-28drm/i915/sdvo: Simplify output setup debugsVille Syrjälä
2022-10-28drm/i915/sdvo: Grab mode_config.mutex during LVDS init to avoid WARNsVille Syrjälä
2022-10-28drm/i915/sdvo: Setup DDC fully before output initVille Syrjälä
2022-10-28drm/i915/sdvo: Filter out invalid outputs more sensiblyVille Syrjälä
2022-10-27drm/i915/sdvo: Extract intel_sdvo_has_audio()Ville Syrjälä
2022-10-27drm/i915/audio: Do the vblank waitsVille Syrjälä
2022-10-27drm/i915/audio: Split "ELD valid" vs. audio PD on hsw+Ville Syrjälä
2022-10-27drm/i915/audio: Use intel_de_rmw() for most audio registersVille Syrjälä
2022-10-27drm/i915/audio: Use u32* for ELDVille Syrjälä
2022-10-27drm/i915/audio: Make sure we write the whole ELD bufferVille Syrjälä
2022-10-27drm/i915/audio: Read ELD buffer size from hardwareVille Syrjälä
2022-10-27drm/i915/audio: Nuke intel_eld_uptodate()Ville Syrjälä
2022-10-27drm/i915/audio: Protect singleton register with a lockVille Syrjälä
2022-10-27drm/i915/audio: Unify register bit namingVille Syrjälä
2022-10-27drm/i915/audio: Use REG_BIT() & co.Ville Syrjälä
2022-10-27drm/i915/audio: Extract struct ilk_audio_regsVille Syrjälä
2022-10-27drm/i915/audio: Remove CL/BLC audio stuffVille Syrjälä
2022-10-27drm/i915/audio: Nuke leftover ROUNDING_FACTORVille Syrjälä
2022-10-27drm/i915/audio: s/dev_priv/i915/Ville Syrjälä
2022-10-26drm/i915/display: Move squash_ctl register programming to its own functionAnusha Srivatsa
2022-10-26drm/i915/display: Move chunks of code out of bxt_set_cdclk()Anusha Srivatsa
2022-10-26drm/i915/display: Introduce HAS_CDCLK_SQUASH macroAnusha Srivatsa
2022-10-26drm/i915/display: Change terminology for cdclk actionsAnusha Srivatsa
2022-10-26drm/i915/tgl+: Sanitize DKL PHY register definitionsImre Deak
2022-10-26drm/i915/tgl+: Move DKL PHY register definitions to intel_dkl_phy_regs.hImre Deak
2022-10-26drm/i915: Rename intel_tc_phy_regs.h to intel_mg_phy_regs.hImre Deak
2022-10-26drm/i915/tgl+: Add locking around DKL PHY register accessesImre Deak
2022-10-26drm/i915/hdmi: stop using connector->override_edidJani Nikula
2022-10-26drm/i915/hdmi: do dual mode detect only if connectedJani Nikula
2022-10-26drm/i915: Stop loading linear degamma LUT on glk needlesslyVille Syrjälä
2022-10-26drm/i915: Get rid of glk_load_degamma_lut_linear()Ville Syrjälä
2022-10-26drm/i915: Assert {pre,post}_csc_lut were assigned sensiblyVille Syrjälä
2022-10-26drm/i915: Introduce crtc_state->{pre,post}_csc_lutVille Syrjälä
2022-10-26drm/i915: Make ilk_load_luts() deal with degammaVille Syrjälä
2022-10-22drm/i915: Introduce intel_crtc_needs_color_update()Ville Syrjälä
2022-10-22drm/i915: Don't flag both full modeset and fastset at the same timeVille Syrjälä
2022-10-22drm/i915: Remove some local 'mode_changed' boolsVille Syrjälä
2022-10-22drm/i915: Introduce intel_crtc_needs_fastset()Ville Syrjälä
2022-10-22drm/i915: Activate DRRS after state readoutVille Syrjälä
2022-10-21drm/i915: Allow panel fixed modes to have differing sync polaritiesVille Syrjälä
2022-10-21drm/i915: Remove one use macroSuraj Kandpal
2022-10-20drm/i915: Name our BARs based on the specVille Syrjälä
generated by cgit (git 2.34.1) at 2025-04-27 23:39:50 +0000