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path: root/drivers/gpu/drm/i915/display
AgeCommit message (Expand)Author
2024-04-19drm/i915: Enable per-lane DP drive settings for bxt/glkVille Syrjälä
2024-04-19drm/i915/dpio: Program bxt/glk PHY TX registers per-laneVille Syrjälä
2024-04-19drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuffVille Syrjälä
2024-04-19drm/i915/dpio: Use intel_de_rmw() for BXT DPIO latency optim setupVille Syrjälä
2024-04-19drm/i915/dpio: Introdude bxt_ddi_phy_rmw_grp()Ville Syrjälä
2024-04-19drm/i915/dpio: Extract bxt_dpio_phy_regs.hVille Syrjälä
2024-04-19drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glkVille Syrjälä
2024-04-19drm/i915/dpio: Clean up bxt/glk PHY registersVille Syrjälä
2024-04-19drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR ratesImre Deak
2024-04-19drm/i915/dp_mst: Make HBLANK expansion quirk work for logical portsImre Deak
2024-04-19drm/dp: Add drm_dp_128b132b_supported()Imre Deak
2024-04-19drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limitImre Deak
2024-04-19drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTLImre Deak
2024-04-19drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT bpp limitImre Deak
2024-04-19drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bppImre Deak
2024-04-19drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limitImre Deak
2024-04-19drm/i915/dp: Fix DSC line buffer depth programmingImre Deak
2024-04-19drm/i915/display: force qgv check after the hw state readoutVinod Govindapillai
2024-04-19drm/i915/display: handle systems with duplicate psf gv pointsStanislav Lisovskiy
2024-04-19drm/i915/display: Disable SAGV on bw init, to force QGV point recalculationStanislav Lisovskiy
2024-04-19drm/i915/display: extract code to prepare qgv points maskVinod Govindapillai
2024-04-19drm/i915/display: Extract code required to calculate max qgv/psf gv pointStanislav Lisovskiy
2024-04-19drm/i915/display: Add meaningful traces for QGV point info error handlingStanislav Lisovskiy
2024-04-19drm/i915: Convert intel_runtime_pm_get_noresume towards raw wakerefRodrigo Vivi
2024-04-18drm/i915/dmc: use struct intel_display moreJani Nikula
2024-04-18drm/i915/de: allow intel_display and drm_i915_private for de functionsJani Nikula
2024-04-18drm/i915/dmc: convert dmc wakelock interface to struct intel_displayJani Nikula
2024-04-18drm/i915/display: rename __intel_wait_for_register_nowl() to indicate intel_de_Jani Nikula
2024-04-18drm/i915/quirks: convert struct drm_i915_private to struct intel_displayJani Nikula
2024-04-18drm/i915/display: accept either i915 or display for feature testsJani Nikula
2024-04-18drm/i915: add generic __to_intel_display()Jani Nikula
2024-04-18drm/i915/display: add generic to_intel_display() macroJani Nikula
2024-04-18drm/i915/display: add intel_display -> drm_device backpointerJani Nikula
2024-04-18drm/i915/display: convert inner wakeref get towards get_if_in_useRodrigo Vivi
2024-04-18drm/i915: limit eDP MSO pipe only for display version 20 and belowLuca Coelho
2024-04-17drm/i915: Suck snps/cx0 PLL states into dpll_hw_stateVille Syrjälä
2024-04-17drm/i915: Unionize dpll_hw_stateVille Syrjälä
2024-04-17drm/i915: Carve up struct intel_dpll_hw_stateVille Syrjälä
2024-04-17drm/i915: Add local DPLL 'hw_state' variablesVille Syrjälä
2024-04-17drm/i915: s/pipe_config/crtc_state/ in legacy PLL codeVille Syrjälä
2024-04-17drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get()Ville Syrjälä
2024-04-17drm/i915: Modernize i9xx_pll_refclk()Ville Syrjälä
2024-04-17drm/i915: Inline {i9xx,ilk}_update_pll_dividers()Ville Syrjälä
2024-04-17drm/i915: Extract {i9xx,i8xx,ilk,vlv,chv}_dpll()Ville Syrjälä
2024-04-17drm/i915: Extract i965_dpll_md()Ville Syrjälä
2024-04-17drm/i915: Pass the PLL hw_state to pll->enable()Ville Syrjälä
2024-04-17drm/i915: Extract i9xx_dpll_get_hw_state()Ville Syrjälä
2024-04-17drm/i915: Extract ilk_dpll_compute_fp()Ville Syrjälä
2024-04-17drm/i915: Extract ilk_fb_cb_factor()Ville Syrjälä
2024-04-17drm/i915: Introduce some local PLL state variablesVille Syrjälä
generated by cgit (git 2.34.1) at 2024-06-07 14:14:41 +0000