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path: root/drivers/gpu/drm/i915/gt/intel_ring_submission.c
AgeCommit message (Expand)Author
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
2020-07-08drm/i915: Release shortlived maps of longlived objectsChris Wilson
2020-07-08drm/i915: Move the engine mask to intel_gt_infoDaniele Ceraolo Spurio
2020-06-03drm/i915: Drop i915_request.i915 backpointerChris Wilson
2020-06-02drm/i915/gt: Move legacy context wa to intel_workaroundsChris Wilson
2020-06-02drm/i915/gt: Split low level gen2-7 CS emittersChris Wilson
2020-04-29drm/i915/gt: Keep a no-frills swappable copy of the default context stateChris Wilson
2020-03-19drm/i915/ring_submission: use drm_device based logging macros.Wambui Karuga
2020-03-15drm/i915/gt: Restrict gen7 w/a batch to HaswellChris Wilson
2020-03-07drm/i915/gt: Wait for the wa batch to be pinnedChris Wilson
2020-03-06drm/i915/gen7: Clear all EU/L3 residual contextsPrathap Kumar Valsan
2020-03-06drm/i915: Add mechanism to submit a context WA on ring submissionMika Kuoppala
2020-03-04drm/i915: Apply i915_request_skip() on submissionChris Wilson
2020-02-27drm/i915: significantly reduce the use of <drm/i915_drm.h>Jani Nikula
2020-02-06drm/i915/gt: Set the PP_DIR registers upon enabling ring submissionChris Wilson
2020-02-01drm/i915: Move ringbuffer WAs to engine workaround listDaniele Ceraolo Spurio
2020-01-30drm/i915/ring: convert to new logging macros in gt/intel_ring_submission.cWambui Karuga
2020-01-22drm/i915/gt: Make WARN* drm specific where drm_priv ptr is availablePankaj Bharadiya
2020-01-09drm/i915/gt: Pull context activation into central intel_context_pin()Chris Wilson
2020-01-07drm/i915/gtt: split up i915_gem_gttMatthew Auld
2020-01-07drm/i915/gt: Take responsibility for engine->release as the last stepChris Wilson
2020-01-03drm/i915/gt: Ignore stale context state upon resumeChris Wilson
2019-12-31drm/i915/gt: Tweak flushes around ivb ppgttChris Wilson
2019-12-30drm/i915/gt: Do not restore invalid RS stateChris Wilson
2019-12-23drm/i915: Mark the GEM context link as RCU protectedChris Wilson
2019-12-22drm/i915/gt: Merge engine init/setup loopsChris Wilson
2019-12-22drm/i915/gt: Pull GT initialisation under intel_gt_init()Chris Wilson
2019-12-21drm/i915: Remove i915->kernel_contextChris Wilson
2019-12-20drm/i915: Drop GEM context as a direct link from i915_requestChris Wilson
2019-12-18drm/i915/gt: Remove direct invocation of breadcrumb signalingChris Wilson
2019-12-17drm/i915/gt: Avoid multi-LRI on SandybridgeChris Wilson
2019-12-16drm/i915/gt: Tidy up full-ppgtt on IvybridgeChris Wilson
2019-12-13drm/i915: Introduce new macros for tracingVenkata Sandeep Dhanalakota
2019-12-08drm/i915/gt: Turn vm off then on again for gen7 mm switchChris Wilson
2019-12-06drm/i915/gt: Replace I915_WRITE with its uncore counterpartAndi Shyti
2019-12-05drm/i915/gt: Bump the PP_DIR invalidation for BaytrailChris Wilson
2019-12-03drm/i915/gt: Set the PD again for HaswellChris Wilson
2019-12-03drm/i915/gt: Track the context validity explicitlyChris Wilson
2019-11-30drm/i915/gt: Push the flush_pd before the set-contextChris Wilson
2019-11-30drm/i915/gen7: Re-enable full-ppgtt for ivb & hswChris Wilson
2019-11-13drm/i915/gt: Invalidate as we write the gen7 breadcrumbChris Wilson
2019-11-12drm/i915/gt: Flush gen7 even harderChris Wilson
2019-11-12drm/i915/gt: Try an extra flush on the Haswell blitterChris Wilson
2019-10-24drm/i915/gt: Split intel_ring_submissionChris Wilson
generated by cgit (git 2.34.1) at 2025-04-05 07:27:22 +0000