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path: root/drivers/gpu/drm/i915/gvt/handlers.c
AgeCommit message (Expand)Author
2017-03-17drm/i915/gvt: replace the gvt_err with gvt_vgpu_errTina Zhang
2017-03-17drm/i915/gvt: handle force-nonpriv registers, cmd parser partZhao Yan
2017-03-02drm/i915/gvt: fix an error for F_RO flagZhao Yan
2017-03-01drm/i915/gvt: fix an error for one registerZhao Yan
2017-03-01drm/i915/gvt: add more registers into handlers listZhao Yan
2017-03-01drm/i915/gvt: have more registers with F_CMD_ACCESS flags setZhao Yan
2017-02-24drm/i915/gvt: add some new MMIOs to cmd_access white listPei Zhang
2017-02-24drm/i915/gvt: fix pcode mailbox write emulation of BDWWeinan Li
2017-02-23drm/i915/gvt: refine pcode write emulationWeinan Li
2017-02-23drm/i915/gvt: add cmd_access to GEN7_HALF_SLICE_CHICKEN1Pei Zhang
2017-02-23drm/i915/gvt: force-nopriv register handlingZhao Yan
2017-02-23drm/i915/gvt: Fix superfluous newline in GVT_DISPLAY_READY env varTakashi Iwai
2017-02-23drm/i915/gvt: fix unhandled mmio warningsZhao Yan
2017-02-23drm/i915/gvt: enter failsafe mode when guest requires more resourcesMin He
2017-02-17drm/i915/gvt: handle fence reg access during GPU resetZhao, Xinda
2017-02-17drm/i915/gvt: introduced failsafe mode into vgpuMin He
2017-01-27Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torval...Dave Airlie
2017-01-13drm/i915/gvt: rewrite gt reset handler using new function intel_gvt_reset_vgp...Changbin Du
2017-01-13drm/i915/gvt: move mmio init/clean function to mmio.cChangbin Du
2017-01-09drm/i915/gvt: fix return value in mul_force_wake_writeChangbin Du
2017-01-09drm/i915/gvt: fix error handing of tlb_control emulationChangbin Du
2017-01-09drm/i915/gvt: verify functions types in new_mmio_info()Nicolas Iooss
2016-11-22drm/i915: rename OACONTROL GEN7_OACONTROLRobert Bragg
2016-11-17drm/i915/gvt: drop checks for early Skylake revisionsJani Nikula
2016-11-14drm/i915/gvt: add more MMIO regs with command access flagPing Gao
2016-11-14drm/i915/gvt: emulate right behavior for tlb_controlPing Gao
2016-11-07drm/i915/gvt: emulate vgpu engine reset control behaviorDu, Changbin
2016-11-07drm/i915/gvt: update misc ctl regs base on stepping infoPing Gao
2016-11-07drm/i915/gvt: correct the emulation in TLB control handlerPing Gao
2016-11-07drm/i915/gvt: add write vreg in MMIO DMA_CTRL handlerPing Gao
2016-10-27drm/i915/gvt: throw error basing on execlist submit resultBing Niu
2016-10-27drm/i915/gvt: add full vGPU reset supportPing Gao
2016-10-26drm/i915/gvt: correct the reset logicPing Gao
2016-10-26drm/i915/gvt: add vreg write for GDRST handlerPing Gao
2016-10-20drm/i915/gvt: properly access enabled intel_engine_csZhenyu Wang
2016-10-20drm/i915/gvt: clean up intel_gvt.h as interface for i915 coreZhenyu Wang
2016-10-18drm/i915/gvt: Fix build failure after intel_engine_cs changeZhenyu Wang
2016-10-14drm/i915/gvt: vGPU context switchZhi Wang
2016-10-14drm/i915/gvt: vGPU schedule policy frameworkZhi Wang
2016-10-14drm/i915/gvt: vGPU workload schedulerZhi Wang
2016-10-14drm/i915/gvt: vGPU workload submissionZhi Wang
2016-10-14drm/i915/gvt: vGPU display virtualizationZhi Wang
2016-10-14drm/i915/gvt: vGPU MMIO virtualizationZhi Wang
2016-10-14drm/i915/gvt: Introduce a framework for tracking HW registers.Zhi Wang
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