summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_gem.c
AgeCommit message (Expand)Author
2018-03-28Backmerge tag 'v4.16-rc7' into drm-nextDave Airlie
2018-03-16drm/i915: Only call tasklet_kill() on the first prepare_resetChris Wilson
2018-03-16drm/i915: Wrap engine->schedule in RCU locks for set-wedge protectionChris Wilson
2018-03-12drm/i915: Only prune fences after wait-for-allChris Wilson
2018-03-05drm/i915: Suspend submission tasklets around wedgingChris Wilson
2018-03-02drm/i915/uc: Introduce intel_uc_suspend|resumeMichal Wajdeczko
2018-03-02drm/i915: Suspend submission tasklets around wedgingChris Wilson
2018-03-01drm/i915: Replace open-coded wait-for loopChris Wilson
2018-02-21drm/i915: Rename drm_i915_gem_request to i915_requestChris Wilson
2018-02-20drm/i915: Move the policy for placement of the GGTT vma into the callerChris Wilson
2018-02-20drm/i915: Also check view->type for a normal GGTT viewChris Wilson
2018-02-20drm/i915: Track number of pending freed objectsChris Wilson
2018-02-16drm: move read_domains and write_domain into i915Christian König
2018-02-09drm/i915: Use INTEL_GEN everywhereTvrtko Ursulin
2018-02-08drm/i915: Mark the device as wedged from the beginning of set-wedgedChris Wilson
2018-02-08drm/i915: do not stop engines on sanitize if i915.reset=0Daniele Ceraolo Spurio
2018-02-08drm/i915: Move the scheduler feature bits into the purview of the enginesChris Wilson
2018-02-07drm/i915: Tidy up some error messages around reset failureChris Wilson
2018-02-05drm/i915: Skip post-reset request emission if the engine is not idleChris Wilson
2018-02-05drm/i915: Remove unbannable context spam from resetChris Wilson
2018-02-05drm/i915: Show the GPU state when declaring wedgedChris Wilson
2018-02-05drm/i915: Add some newlines to intel_engine_dump() headersChris Wilson
2018-02-01drm/i915: Always run hangcheck while the GPU is busyChris Wilson
2018-02-01drm/i915/guc: Add uc_fini_wq in gem_init unwind pathSagar Arun Kamble
2018-01-31drm/i915: Always run hangcheck while the GPU is busyChris Wilson
2018-01-24drm/i915/guc: Fix lockdep due to log relay channel handling under struct_mutexSagar Arun Kamble
2018-01-24drm/i915: Shrink the GEM kmem_caches upon idlingChris Wilson
2018-01-18drm/i915: Avoid waitboosting on the active requestChris Wilson
2018-01-18BackMerge tag 'v4.15-rc8' into drm-nextDave Airlie
2018-01-16drm/i915: Rewrite some comments around RCU-deferred object freeChris Wilson
2018-01-15drm/i915: Use our singlethreaded wq for freeing objectsChris Wilson
2018-01-11drm/i915: Don't adjust priority on an already signaled fenceChris Wilson
2018-01-10drm/i915/guc: Add uc_fini_wq in gem_init unwind pathSagar Arun Kamble
2018-01-08drm/i915: Don't adjust priority on an already signaled fenceChris Wilson
2017-12-19drm/i915: Add a strong mb to resetting the has-CS-interrupt bitChris Wilson
2017-12-18drm/i915: prefer i915_gem_object_has_pages()Matthew Auld
2017-12-16drm/i915: Restore the kernel context after a GPU reset on an idle engineChris Wilson
2017-12-14drm/i915: Flush pending GTT writes before unbindingChris Wilson
2017-12-14drm/i915/guc: Extract guc_init from guc_init_hwMichał Winiarski
2017-12-14drm/i915/guc: Move GuC workqueue allocations outside of the mutexMichał Winiarski
2017-12-13drm/i915: Unwind i915_gem_init() failureChris Wilson
2017-12-13drm/i915: Don't check #active_requests from i915_gem_wait_for_idle()Chris Wilson
2017-12-12drm/i915: Dump the engine state before declaring wedged from wait_for_engines()Chris Wilson
2017-12-12drm/i915: Bump timeout for wait_for_engines()Chris Wilson
2017-12-12drm/i915: make mappable struct resource centricMatthew Auld
2017-12-08drm/i915: Restore GT performance in headless mode with DMC loadedTvrtko Ursulin
2017-12-07drm/i915: Refactor common list iteration over GGTT vmaChris Wilson
2017-12-07drm/i915: Track GGTT writes on the vmaChris Wilson
2017-12-07drm/i915: Remove vma from object on destroy, not closeChris Wilson
2017-12-07drm/i915: Call i915_gem_init_userptr() before taking struct_mutexChris Wilson
generated by cgit (git 2.34.1) at 2024-06-30 00:19:03 +0000