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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2014-09-08drm/i915: Evict CS TLBs between batchesChris Wilson
2014-08-07drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang
2014-08-05Merge tag 'v3.16' into drm-nextDave Airlie
2014-07-29Merge remote-tracking branch 'airlied/drm-next' into drm-intel-nextDaniel Vetter
2014-07-21drm/i915: add some registers need for displayport MST support.Dave Airlie
2014-07-12drm/i915/chv: calculate rc6 residency correctlyMika Kuoppala
2014-07-11drm/i915: populate mem_freq/cz_clock for chvDeepak S
2014-07-10drm/i915: Switch to common shared dpll framework for WRPLLsDaniel Vetter
2014-07-10drm/i915: State readout support for WRPLLsDaniel Vetter
2014-07-10drm/i915: State readout and cross-checking for ddi_pll_selDaniel Vetter
2014-07-10drm/i915: Clean up WRPLL/SPLL #definesDaniel Vetter
2014-07-10drm/i915: fix D_COMP usage on BDWPaulo Zanoni
2014-07-09drm/i915: Don't clobber the GTT when it's within stolen memoryVille Syrjälä
2014-07-08drm/i915/vlv: WA for Turbo and RC6 to work together.Deepak S
2014-07-07drm/i915/bdw: implement semaphore waitBen Widawsky
2014-07-07drm/i915/bdw: implement semaphore signalBen Widawsky
2014-07-07drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bitsVille Syrjälä
2014-06-18drm/i915: Add some L3 registers to the parser whitelistBrad Volkin
2014-06-16drm/i915: update BDW DDI buffer translationsPaulo Zanoni
2014-06-13drm/i915: BDW PSR: Add single frame update support.Rodrigo Vivi
2014-06-13drm/i915: Fix VLV CRC reading.Rodrigo Vivi
2014-06-11drm/i915: Add #defines for short/long pulse on gmch platformsDaniel Vetter
2014-06-11drm/i915: Use transcoder as index to MIPI regsShashank Sharma
2014-06-11drm/i915: Change Mipi register definitionsShashank Sharma
2014-06-11drm/i915/chv: Handle video DIP registers on CHVVille Syrjälä
2014-06-11drm/i915: Don't use pipe_offset stuff for DPLL registersVille Syrjälä
2014-06-11drm/i915/chv: Force clock buffer enablesVille Syrjälä
2014-06-11drm/i915/chv: Try to program the PHY used clock channel overridesVille Syrjälä
2014-06-11drm/i915/chv: Enable RPS (Turbo) for CherryviewDeepak S
2014-06-11drm/i915/chv: Enable Render Standby (RC6) for CherryviewDeepak S
2014-06-05drm/i915: Enable interrupt-based AGPBUSY# enable on 85xVille Syrjälä
2014-06-05drm/i915: Flip the sense of AGPBUSY_DIS bitVille Syrjälä
2014-05-22drm/i915: Implement WaVcpClkGateDisableForMediaReset:ctg, elkVille Syrjälä
2014-05-22drm/i915: Add a brief description of the VLV display PHY internalsVille Syrjälä
2014-05-21drm/i915: Fix mmio vs. CS flip race on ILK+Ville Syrjälä
2014-05-20drm/i915: Drop /** */ comments from i915_reg.hVille Syrjälä
2014-05-20drm/i915/chv: Add a bunch of pre production workaroundsVille Syrjälä
2014-05-20drm/i915/chv: Use RMW to toggle swing calc initVille Syrjälä
2014-05-20drm/i915/chv: Don't do group access reads from TX lanes eitherVille Syrjälä
2014-05-20drm/i915/chv: Don't use PCS group access readsVille Syrjälä
2014-05-20drm/i915/chv: Set soft reset override bit for data lane resetsVille Syrjälä
2014-05-20drm/i915/chv: Register port D encoders and connectorsVille Syrjälä
2014-05-20drm/i915/chv: Fix PORT_TO_PIPE for CHVVille Syrjälä
2014-05-20drm/i915/chv: Add cursor pipe offsetsVille Syrjälä
2014-05-20drm/i915/chv: Fix gmbus for port DVille Syrjälä
2014-05-20drm/i915/chv: Add CHV display supportRafael Barbalho
2014-05-20drm/i915: Fix ILK GPU reset domain bitsVille Syrjälä
2014-05-19drm/i915: Add MIPI mmio reg baseShashank Sharma
2014-05-19drm/i915: rename IOSF sideband opcodes according to the specImre Deak
2014-05-15drm/i915: Enable PM Interrupts target via Display Interface.Deepak S
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