summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2022-06-27drm/i915: Prefer "XEHP_" prefix for registersMatt Roper
2022-06-27drm/i915: Correct duplicated/misplaced GT register definitionsMatt Roper
2022-05-26drm/i915/gt: Add media RP0/RPn to per-gt sysfsDale B Stimson
2022-05-23Merge tag 'drm-intel-next-2022-05-20' of git://anongit.freedesktop.org/drm/dr...Tvrtko Ursulin
2022-05-20drm/i915/pcode: Add a couple of pcode helpersDale B Stimson
2022-05-19drm/i915/reg: fix undefined behavior due to shift overflowing the constantJani Nikula
2022-05-10drm/i915/pvc: Engine definitions for new copy enginesMatt Roper
2022-05-10drm/i915/pvc: Read correct RP_STATE_CAP registerMatt Roper
2022-04-25drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addressesImre Deak
2022-04-21drm/i915/dg2: add gsc with special gsc bar offsetsTomas Winkler
2022-04-21drm/i915/gsc: add gsc as a mei auxiliary deviceTomas Winkler
2022-04-21Merge drm/drm-next into drm-intel-gt-nextRodrigo Vivi
2022-04-20drm/i915/display: Add workaround 22014263786José Roberto de Souza
2022-04-20drm/i915: Fix DISP_POS_Y and DISP_HEIGHT definesHans de Goede
2022-04-12Merge drm/drm-next into drm-intel-gt-nextJoonas Lahtinen
2022-04-11Merge drm/drm-next into drm-intel-nextJani Nikula
2022-04-06drm/i915/adlp: Fix register corruption after DDI clock enablingImre Deak
2022-04-01drm/i915/dmc: split out dmc registers to a separate fileJani Nikula
2022-03-30drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX...José Roberto de Souza
2022-03-24Merge tag 'drm-next-2022-03-24' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
2022-03-21drm/i915/gt: Add sysfs throttle frequency interfacesSujaritha Sundaresan
2022-03-18drm/i915: Rename QGV request/response bitsVille Syrjälä
2022-03-18drm/i915: Unconfuses QGV vs. PSF point masksVille Syrjälä
2022-03-16drm/i915/stolen: don't treat small BAR as an errorAkeem G Abodunrin
2022-03-10drm/i915: Rename PIPECONF refresh select bitsVille Syrjälä
2022-03-10drm/i915: Program MSA timing delay on ilk/snb/ivbVille Syrjälä
2022-03-10drm/i915: Clean up bxt/glk PLL registersVille Syrjälä
2022-03-07drm/i915/psr: Set "SF Partial Frame Enable" also on full updateJouni Högander
2022-03-03drm/i915/psr: Set "SF Partial Frame Enable" also on full updateJouni Högander
2022-03-02drm/i915/xehp: Define compute class and engineMatt Roper
2022-02-25Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin
2022-02-24drm/i915/dg2: Tile 4 plane format supportStanislav Lisovskiy
2022-02-23Merge tag 'drm-intel-gt-next-2022-02-17' of git://anongit.freedesktop.org/drm...Rodrigo Vivi
2022-02-23drm/i915/tgl: Simply subplatform detectionJosé Roberto de Souza
2022-02-21drm/i915/adlp: Add TypeC PHY TBT->DP-alt/legacy mode switch workaroundImre Deak
2022-02-21drm/i915/reg: split out icl_dsi_regs.hJani Nikula
2022-02-21drm/i915/reg: split out vlv_dsi_regs.h and vlv_dsi_pll_regs.hJani Nikula
2022-02-21drm/i915/dsi: add separate init timer mask definition for ICL DSIJani Nikula
2022-02-19drm/i915/lmem: Enable lmem for platforms with Flat CCSAbdiel Janulgue
2022-02-18drm/i915/dg2: Enable 5th portMatt Roper
2022-02-18drm/i915: Fix for PHY_MISC_TC1 offsetJouni Högander
2022-02-18drm/i915/display: Implement Wa_16013835468José Roberto de Souza
2022-02-18drm/i915/display/tgl+: Implement new PLL programming stepJosé Roberto de Souza
2022-02-18drm/i915: Polish ilk+ wm register bitsVille Syrjälä
2022-02-18drm/i915: Clean up SSKPD/MLTR definesVille Syrjälä
2022-02-16drm/i915: Move MCHBAR registers to their own headerMatt Roper
2022-02-16drm/i915: Define MCH registers relative to MCHBAR_MIRROR_BASEMatt Roper
2022-02-14drm/i915/dg1: Update DMC_DEBUG3 registerChuansheng Liu
2022-02-11drm/i915/dg2: Add Wa_22011450934Ramalingam C
2022-02-03Merge drm/drm-next into drm-intel-gt-nextJoonas Lahtinen
generated by cgit (git 2.34.1) at 2025-05-29 13:39:25 +0000