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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2016-06-08drm/i915: Add WaInsertDummyPushConstP for bxt and kblMika Kuoppala
2016-06-08drm/i915/kbl: Add WaDisableDynamicCreditSharingMika Kuoppala
2016-06-08drm/i915/kbl: Add WaDisableGamClockGatingMika Kuoppala
2016-06-08drm/i915/gen9: Enable must set chicken bits in config0 regMika Kuoppala
2016-06-08drm/i915/edp: Add WaKVMNotificationOnConfigChange:bdwMika Kuoppala
2016-06-08drm/i915/skl: Add WaDisableGafsUnitClkGatingMika Kuoppala
2016-06-06drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateCleararun.siluvery@linux.intel.com
2016-06-06drm/i915/dsi: fix bxt split screen and color issueJani Nikula
2016-05-31drm/i915: Update GEN6_PMINTRMSK setup with GuC enabledSagar Arun Kamble
2016-05-20drm/i915/psr: Implement PSR2 w/a for gen9Daniel Vetter
2016-05-13drm/i915: Program BXT_CDCLK_CD2X_PIPEVille Syrjälä
2016-05-03drm/i915/chv: Tune L3 SQC credits based on actual latenciesImre Deak
2016-05-03drm/i915: Clean up L3 SQC register field definitionsImre Deak
2016-04-28drm/i915: Update CDCLK_FREQ register on BDW after changing cdclk frequencyVille Syrjälä
2016-04-27drm/i915: Update RAWCLK_FREQ register on VLV/CHVVille Syrjälä
2016-04-25drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerfTim Gore
2016-04-24drm/i915: Macros to convert PM time interval values to microsecondsAkash Goel
2016-04-22drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDWVille Syrjälä
2016-04-20drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupportTim Gore
2016-04-19drm/i915: Clean up PCI config register handlingJoonas Lahtinen
2016-04-15drm/i915/bxt: Fix GRC code register field definitionsImre Deak
2016-04-14drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHVVille Syrjälä
2016-04-14drm/i915: Calculate edram sizeMika Kuoppala
2016-04-14drm/i915: Store and use edram capabilitiesMika Kuoppala
2016-04-11drm/i915: implement WaClearTdlStateAckDirtyBitsTim Gore
2016-04-06drm/i915: Set invert bit for hpd based on VBTShubhangi Shrivastava
2016-04-05drm/i915: Use GPLL ref clock to calculate GPU freqs on VLV/CHVVille Syrjälä
2016-04-05drm/i915/guc: reset GuC and retry on firmware load failureArun Siluvery
2016-04-05drm/i915/chv: add more IOSF port definitionsJani Nikula
2016-04-01drm/i915: Implement WaPixelRepeatModeFixForC0:chvVille Syrjälä
2016-04-01drm/i915: BXT DDI PHY sequence BUNVandana Kannan
2016-03-24drm/i915/bxt: Fix DSI HW state readoutImre Deak
2016-03-22drm/i915/bxt: Initialize MIPI DSI for BXTShashank Sharma
2016-03-21drm/i915: Implement color management on chvLionel Landwerlin
2016-03-21drm/i915: Implement color management on bdw/skl/bxt/kblLionel Landwerlin
2016-03-21drm/i915: Add Haswell CS GPR registers to whitelistJordan Justen
2016-03-18drm/i915/gen9: add WaClearFlowControlGpgpuContextSaveTim Gore
2016-03-17drm/i915: Modify reset func to handle per engine resetsMika Kuoppala
2016-03-16drm/i915/bxt: fix dsi hw state pipe readoutJani Nikula
2016-03-16drm/i915/dsi: lose the loose 666 format name in favor of packedJani Nikula
2016-03-04drm/i915: Read out hrawclk from CCK on vlv/chvVille Syrjälä
2016-03-03drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwardsDeepak M
2016-03-01drm/i915: Read out VGA dotclock properly on LPTVille Syrjälä
2016-02-22drm/i915/gen9: Extend dmc debug mask to include coresMika Kuoppala
2016-02-15drm/i915: Fix hpd live status bits for g4xVille Syrjälä
2016-02-10drm/i915: Handle PipeC fused off on IVB/HSW/BDWGabriel Feceoru
2016-02-10drm/i915/skl: Fix typo in DPLL_CFGCR1 definitionLyude
2016-02-05drm/i915/bxt: Check BIOS RC6 setup before enabling RC6Sagar Arun Kamble
2016-02-04drm/i915: Extend gpio read/write to other coresDeepak M
2016-02-04drm/i915/vlv: drop unused vlv_gps_core_read/write functionsJani Nikula
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