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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2024-08-29drm/i915/dsb: Hook up DSB error interruptsVille Syrjälä
2024-08-12drm/i915/bmg: Read display register timeoutMitul Golani
2024-06-19drm/i915: Enable plane/pipeDMC ATS fault interrupts on mtlVille Syrjälä
2024-06-19drm/i915: Enable pipeDMC fault interrupts on tgl+Ville Syrjälä
2024-06-19drm/i915: Nuke the intermediate pipe fault bitmasksVille Syrjälä
2024-06-19drm/i915: Extend GEN9_PIPE_PLANE_FLIP_DONE() to cover all universal planesVille Syrjälä
2024-06-19drm/i915: Sort bdw+ pipe interrupt bitsVille Syrjälä
2024-06-19drm/i915: Document bdw+ pipe interrupt bitsVille Syrjälä
2024-06-19drm/i915: Use REG_BIT() for bdw+ pipe interruptsVille Syrjälä
2024-06-14drm/i915: remove unused pipe/plane B register macrosJani Nikula
2024-06-14drm/i915: relocate some DSPCNTR reg bit definitionsJani Nikula
2024-06-11drm/i915: Separate VRR related register definitionsMitul Golani
2024-06-11drm/i915: Update indentation for VRR registers and bitsMitul Golani
2024-06-07drm/i915: pass dev_priv explicitly to HSW_STEREO_3D_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to MTL_CLKGATE_DIS_TRANSJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_SET_CONTEXT_LATENCYJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_MSA_MISCJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TGL_DP_TP_STATUSJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TGL_DP_TP_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTL2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_N2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_M2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_N1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_M1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to SWF3Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to SWF1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to SWF0Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to CHV_CANVASJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to CHV_BLENDJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FLIPCOUNT_G4XJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FRMCOUNT_G4XJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to DSPFW3Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to DSPFW2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to DSPFW1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to DSPARBJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to ICL_PIPESTATUSJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_ARB_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPESTATJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPEFRAMEPIXELJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPEFRAMEJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPEDSLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PFIT_AUTO_RATIOSJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PFIT_PGM_RATIOSJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PFIT_CONTROLJani Nikula
generated by cgit (git 2.34.1) at 2025-03-19 07:52:07 +0000