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path: root/drivers/gpu/drm/i915/intel_display.c
AgeCommit message (Expand)Author
2015-08-13drm/i915: Commit planes on each crtc separately.Maarten Lankhorst
2015-08-13drm/i915: calculate primary visibility changes instead of calling from set_co...Maarten Lankhorst
2015-08-13drm/i915: Only dither on 6bpc panelsDaniel Vetter
2015-07-14drm/i915: Do not call intel_crtc_disable if the crtc is already disabled.Maarten Lankhorst
2015-07-13drm/i915: fix oops in primary_check_planeDaniel Vetter
2015-07-12Revert "drm/i915: Use crtc_state->active in primary check_plane func"Linus Torvalds
2015-07-08drm/i915: Use crtc_state->active in primary check_plane funcDaniel Vetter
2015-07-08drm/i915: Check crtc->active in intel_crtc_disable_planesDaniel Vetter
2015-07-06drm/i915/chv: fix HW readout of the port PLL fractional dividerImre Deak
2015-06-26drm/i915: Fix IPS related flickerRodrigo Vivi
2015-06-22drm/i915: Silence compiler warningAnder Conselvan de Oliveira
2015-06-17drm/i915: Don't set enabled value of all CRTCs when restoring the modeAnder Conselvan de Oliveira
2015-06-17drm/i915: Don't update staged config during force restore modesetsAnder Conselvan de Oliveira
2015-06-17drm/i915: Don't check modeset state in the hw state force restore pathAnder Conselvan de Oliveira
2015-05-29drm/i915: Return the frontbuffer flip to enable intel_crtc_enable_planes.Rodrigo Vivi
2015-05-28drm/i915: Adjust sideband locking a bit for CHV/VLVVille Syrjälä
2015-05-28drm/i915: s/dpio_lock/sb_lock/Ville Syrjälä
2015-05-28drm/i915: Kill intel_flush_primary_plane()Ville Syrjälä
2015-05-22drm/i915/skl: don't fail colorkey + scaler requestChandra Konduru
2015-05-21drm/i915: Disable FDI RX/TX before the portsVille Syrjälä
2015-05-21drm/i915: Fix DP enhanced framing for CPTVille Syrjälä
2015-05-21drm/i915/skl: Deinit/init the display at suspend/resumeDamien Lespiau
2015-05-21drm/i915: Limit mmio flip RPS boostsChris Wilson
2015-05-21drm/i915: Implement inter-engine read-read optimisationsChris Wilson
2015-05-21drm/i915: s/\<rq\>/req/gDaniel Vetter
2015-05-20drm/i915/skl: Swapping 90 and 270 to be compliant with XrandrSonika Jindal
2015-05-20drm/i915: Update comment in clear_intel_crtc_state()Ander Conselvan de Oliveira
2015-05-20drm/i915: Tighten the exposure ARGB/ABGR 8888 formatsDamien Lespiau
2015-05-20drm/i915: Don't expose ARGB1555 on gen2/3Damien Lespiau
2015-05-20drm/i915: Remove ARBG/ABGR 2101010 on platform not supporting those formatsDamien Lespiau
2015-05-20drm/i915: Remove the COMMON_PRIMARY_FORMATS definesDamien Lespiau
2015-05-20drm/i915: Preserve ddi_pll_sel when allocating new pipe_configAnder Conselvan de Oliveira
2015-05-20drm/i915: Dump some DPLL fields in pipe config debugTvrtko Ursulin
2015-05-20drm/i915: Don't overwrite (e)DP PLL selection on SKLAnder Conselvan de Oliveira
2015-05-20drm/i915: Output scaler related pipe config debug in a single lineTvrtko Ursulin
2015-05-20drm/i915/skl: Remove unnecessary local variables in skl_plane_ctl*()Damien Lespiau
2015-05-20drm/i915: Don't use the intel_ prefix for gen-specific dataDamien Lespiau
2015-05-20drm/i915/skl: Support the advertized index formatDamien Lespiau
2015-05-20drm/i915/skl: Replace BUG() by MISSING_CASE() in skl_plane_ctl_format()Damien Lespiau
2015-05-20drm/i915/skl: Rename a local variable to fit in 80 charsDamien Lespiau
2015-05-20drm/i915/skl: Add a new line before returnDamien Lespiau
2015-05-20drm/i915/skl: Leave a new line between variable declarations and codeDamien Lespiau
2015-05-20drm/i915: Make scaler_id check in check_crtc_state work for all gensChandra Konduru
2015-05-20drm/i915: Fix race on unreferencing the wrong mmio-flip-requestChris Wilson
2015-05-20drm/i915: Ensure cache flushes prior to doing CS flipsChris Wilson
2015-05-20drm/i915: Remove domain flubbing from i915_gem_object_finish_gpu()Chris Wilson
2015-05-20drm/i915: call intel_tile_height with correct parameterChandra Konduru
2015-05-20drm/i915: Always keep crtc_state->active in sync with enableMaarten Lankhorst
2015-05-20Backmerge v4.1-rc4 into into drm-nextDave Airlie
2015-05-08drm/i915: Only wait for required lanes in vlv_wait_port_ready()Ville Syrjälä
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