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path: root/drivers/pinctrl
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2025-02-06pinctrl: pinconf-generic: Print unsigned value if a format is registeredClaudiu Beznea
Commit 3ba11e684d16 ("pinctrl: pinconf-generic: print hex value") unconditionally switched to printing hex values in pinconf_generic_dump_one(). However, if a dump format is registered for the dumped pin, the hex value is printed as well. This hex value does not necessarily correspond 1:1 with the hardware register value (as noted by commit 3ba11e684d16 ("pinctrl: pinconf-generic: print hex value")). As a result, user-facing output may include information like: output drive strength (0x100 uA). To address this, check if a dump format is registered for the dumped property, and print the unsigned value instead when applicable. Fixes: 3ba11e684d16 ("pinctrl: pinconf-generic: print hex value") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20250205101058.2034860-1-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-03pinctrl: cy8c95x0: Respect IRQ trigger settings from firmwareAndy Shevchenko
Some of the platforms may connect the INT pin via inversion logic effectively make the triggering to be active-low. Remove explicit trigger flag to respect the settings from firmware. Without this change even idling chip produces spurious interrupts and kernel disables the line in the result: irq 33: nobody cared (try booting with the "irqpoll" option) CPU: 0 UID: 0 PID: 125 Comm: irq/33-i2c-INT3 Not tainted 6.12.0-00236-g8b874ed11dae #64 Hardware name: Intel Corp. QUARK/Galileo, BIOS 0x01000900 01/01/2014 ... handlers: [<86e86bea>] irq_default_primary_handler threaded [<d153e44a>] cy8c95x0_irq_handler [pinctrl_cy8c95x0] Disabling IRQ #33 Fixes: e6cbbe42944d ("pinctrl: Add Cypress cy8c95x0 support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250117142304.596106-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-03pinctrl: cy8c95x0: Rename PWMSEL to SELPWMAndy Shevchenko
There are two registers in the hardware, one, "Select PWM", is per-port configuration enabling PWM function instead of GPIO. The other one is "PWM Select" is per-PWM selector to configure PWM itself. Original code uses abbreviation of the latter to describe the former. Rename it to follow the datasheet. Fixes: e6cbbe42944d ("pinctrl: Add Cypress cy8c95x0 support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250203131506.3318201-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-03pinctrl: cy8c95x0: Enable regmap locking for debugAndy Shevchenko
When regmap locking is disabled, debugfs is also disabled. Enable locking for debug when CONFIG_DEBUG_PINCTRL is set. Fixes: f71aba339a66 ("pinctrl: cy8c95x0: Use single I2C lock") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250203131506.3318201-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-03pinctrl: cy8c95x0: Avoid accessing reserved registersAndy Shevchenko
The checks for vrtual registers in the cy8c95x0_readable_register() and cy8c95x0_writeable_register() are not aligned and broken. Fix that by explicitly avoiding reserved registers to be accessed. Fixes: 71e4001a0455 ("pinctrl: pinctrl-cy8c95x0: Fix regcache") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250203131506.3318201-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-03pinctrl: cy8c95x0: Fix off-by-one in the regmap range settingsAndy Shevchenko
The range_max is inclusive, so we need to use the number of the last accessible register address. Fixes: 8670de9fae49 ("pinctrl: cy8c95x0: Use regmap ranges") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250203131506.3318201-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-24Merge tag 'pinctrl-v6.14-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - New subdriver for the Qualcomm MSM8917 SoC TLMM - New subdriver for the Mediatek MT7988 SoC - New subdriver for the Rockchip RK3562 SoC - New subdriver for the Renesas RZ/G3E SoC Improvements: - Fix some missing pins in the Qualcomm IPQ5424 TLMM - Fix some missing LVDS pins in the Sunxi A100/A133 - Support Sunxi V853 (simple compatible string) - Cleanups in the Samsung driver - Fix some AMD suspend behaviour - Cleanups" * tag 'pinctrl-v6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (29 commits) dt-bindings: pinctrl: sunxi: add compatible for V853 pinctrl: Use str_enable_disable-like helpers dt-bindings: pinctrl: Correct indentation and style in DTS example pinctrl: amd: Take suspend type into consideration which pins are non-wake pinctrl: stm32: Add check for clk_enable() pinctrl: renesas: rzg2l: Fix PFC_MASK for RZ/V2H and RZ/G3E pinctrl: sunxi: add missed lvds pins for a100/a133 pinctrl: mediatek: Drop mtk_pinconf_bias_set_pd() pinctrl: renesas: rzg2l: Add support for RZ/G3E SoC pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg table dt-bindings: pinctrl: renesas: Document RZ/G3E SoC dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H pinctrl: rockchip: add rk3562 support dt-bindings: pinctrl: Add rk3562 pinctrl support pinctrl: Fix the clean up on pinconf_apply_setting failure dt-bindings: pinctrl: add binding for MT7988 SoC pinctrl: mediatek: add MT7988 pinctrl driver pinctrl: mediatek: add support for MTK_PULL_PD_TYPE pinctrl: ocelot: Constify some structures pinctrl: renesas: rzg2l: Add audio clock pins on RZ/G3S ...
2025-01-15pinctrl: Use str_enable_disable-like helpersKrzysztof Kozlowski
Replace ternary (condition ? "enable" : "disable") syntax with helpers from string_choices.h because: 1. Simple function call with one argument is easier to read. Ternary operator has three arguments and with wrapping might lead to quite long code. 2. Is slightly shorter thus also easier to read. 3. It brings uniformity in the text - same string. 4. Allows deduping by the linker, which results in a smaller binary file. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Antonio Borneo <antonio.borneo@foss.st.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/20250114203602.1013275-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-15Merge tag 'renesas-pinctrl-for-v6.14-tag3' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.14 (take three) - Fix PFC_MASK for RZ/V2H and RZ/G3E. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-14pinctrl: amd: Take suspend type into consideration which pins are non-wakeMaciej S. Szmigiero
Some laptops have pins which are a wake source for S0i3/S3 but which aren't a wake source for S4/S5 and which cause issues when left unmasked during hibernation (S4). For example HP EliteBook 855 G7 has pin #24 that causes instant wakeup (hibernation failure) if left unmasked (it is a wake source only for S0i3/S3). GPIO pin #24 on this platform is likely dedicated to WWAN XMM7360 modem since this pin triggers wake notify to WWAN modem's parent PCIe port. Fix this by considering a pin a wake source only if it is marked as one for the current suspend type (S0i3/S3 vs S4/S5). Since Z-wake pins only make sense at runtime these were excluded from both of suspend categories, so pins with only the Z-wake flag set are effectively treated as non-wake pins. Fixes: 2fff0b5e1a6b ("pinctrl: amd: Mask non-wake source pins with interrupt enabled at suspend") Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/d4b2d076366fdd08a0c1cd9b7ecd91dc95e07269.1736184752.git.mail@maciej.szmigiero.name Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-14pinctrl: stm32: Add check for clk_enable()Mingwei Zheng
Convert the driver to clk_bulk*() API. Add check for the return value of clk_bulk_enable() to catch the potential error. Fixes: 05d8af449d93 ("pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested") Signed-off-by: Mingwei Zheng <zmw12306@gmail.com> Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com> Reviewed-by: Antonio Borneo <antonio.borneo@foss.st.com> Link: https://lore.kernel.org/20250106220659.2640365-1-zmw12306@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-14Merge tag 'renesas-pinctrl-for-v6.14-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.14 (take two) - Add support for alpha-numerical port references on the RZ/V2H SoC, - Add support for the RZ/G3E (R9A09G047) Soc. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-14pinctrl: renesas: rzg2l: Fix PFC_MASK for RZ/V2H and RZ/G3ELad Prabhakar
The PFC_MASK value for the PFC_mx registers is currently hardcoded to 0x07, which is correct for SoCs in the RZ/G2L family, but insufficient for RZ/V2H and RZ/G3E, where the mask value should be 0x0f. This discrepancy causes incorrect PFC register configuration on RZ/V2H and RZ/G3E SoCs. On RZ/G2L, the PFC_mx bitfields are also 4 bits wide, with bit 4 marked as reserved. The reserved bits are documented to read as zero and be ignored when written. Updating the PFC_MASK definition from 0x07 to 0x0f ensures compatibility with both SoC families while maintaining correct behavior on RZ/G2L. Fixes: 9bd95ac86e70 ("pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC") Cc: stable@vger.kernel.org Reported-by: Hien Huynh <hien.huynh.px@renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250110221045.594596-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-01-13pinctrl: sunxi: add missed lvds pins for a100/a133Parthiban Nallathambi
lvds, lcd, dsi all shares the same GPIO D bank and lvds0 data 3 lines and lvds1 pins are missed, add them. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Link: https://lore.kernel.org/20241227-a133-display-support-v1-10-13b52f71fb14@linumiz.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-08pinctrl: mediatek: Drop mtk_pinconf_bias_set_pd()Linus Walleij
This function is unused and causing compile errors, delete it. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/linux-next/20250106164630.4447cd0d@canb.auug.org.au/ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-03pinctrl: renesas: rzg2l: Add support for RZ/G3E SoCBiju Das
Add pinctrl driver support for RZ/G3E SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-01-03pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg tableBiju Das
Currently r9a09g057_variable_pin_cfg table uses port 11 instead of port PB as mentioned in the hardware manual. Update the r9a09g057_variable_pin_cfg table with alpha-numeric port names to match with the hardware manual. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-01-03Merge tag 'pinctrl-v6.13-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - A small Kconfig fixup for the i.MX. In principle this could come in from the SoC tree but the bug was introduced from the pin control tree so let's fix it from here. - Fix a sleep in atomic context in the MCP23xxx GPIO expander by disabling the regmap locking and using explicit mutex locks. * tag 'pinctrl-v6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: mcp23s08: Fix sleeping in atomic context due to regmap locking ARM: imx: Re-introduce the PINCTRL selection
2025-01-03Merge tag 'samsung-pinctrl-6.14' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.14 Two fixes for very old issues around error handling and also one cleanup. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27pinctrl: rockchip: add rk3562 supportSteven Liu
Add support for the 5 GPIO banks in the rk3562. Signed-off-by: Steven Liu <steven.liu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/20241224093620.3815705-1-kever.yang@rock-chips.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27pinctrl: Fix the clean up on pinconf_apply_setting failureMukesh Ojha
When some client does devm_pinctrl_get() followed by pinctrl_select_state() that does pinmux first successfully and later during config setting it sets the wrong drive strenght to the pin due to which pinconf_apply_setting fails. Currently, on failure during config setting is implemented as if pinmux has failed for one of the pin but that does not seem right and need to undo the pinmux for all the pin if config setting fails. Current commit does a bit refactor to reuse the code and tries to clean up mux setting on config setting failure. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/20241224084441.515870-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27pinctrl: mediatek: add MT7988 pinctrl driverDaniel Golle
Add pinctrl driver for the MediaTek MT7988 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> [correctly initialise for the function_desc structure] Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20241217085435.9586-3-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27pinctrl: mediatek: add support for MTK_PULL_PD_TYPEDaniel Golle
The MediaTek MT7988 SoC got some pins which only got configurable pull-down but unlike previous designs there is no pull-up option. Add new type MTK_PULL_PD_TYPE to support configuring such pins. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20241217085435.9586-2-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-20pinctrl: ocelot: Constify some structuresChristophe JAILLET
'struct ocelot_match_data and 'struct irq_chip' are not modified in this driver. Constifying these structures moves some data to a read-only section, so increase overall security, especially when the structure holds some function pointers. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 41459 9008 80 50547 c573 drivers/pinctrl/pinctrl-ocelot.o After: ===== text data bss dec hex filename 42803 7640 80 50523 c55b drivers/pinctrl/pinctrl-ocelot.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/32edcf0567fffd0b1a219e7e2dad7e0bd8c5aaf4.1734023550.git.christophe.jaillet@wanadoo.fr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-20Merge tag 'renesas-pinctrl-for-v6.14-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.14 - Add audio clock pin support for the RZ/G3S SoC. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-20pinctrl: renesas: rzg2l: Add audio clock pins on RZ/G3SClaudiu Beznea
Add audio clock pins on the RZ/G3S SoC. These are used by audio IPs as input pins to feed them with audio clocks. Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241113133540.2005850-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-17pinctrl: mcp23s08: Fix sleeping in atomic context due to regmap lockingEvgenii Shatokhin
If a device uses MCP23xxx IO expander to receive IRQs, the following bug can happen: BUG: sleeping function called from invalid context at kernel/locking/mutex.c:283 in_atomic(): 1, irqs_disabled(): 1, non_block: 0, ... preempt_count: 1, expected: 0 ... Call Trace: ... __might_resched+0x104/0x10e __might_sleep+0x3e/0x62 mutex_lock+0x20/0x4c regmap_lock_mutex+0x10/0x18 regmap_update_bits_base+0x2c/0x66 mcp23s08_irq_set_type+0x1ae/0x1d6 __irq_set_trigger+0x56/0x172 __setup_irq+0x1e6/0x646 request_threaded_irq+0xb6/0x160 ... We observed the problem while experimenting with a touchscreen driver which used MCP23017 IO expander (I2C). The regmap in the pinctrl-mcp23s08 driver uses a mutex for protection from concurrent accesses, which is the default for regmaps without .fast_io, .disable_locking, etc. mcp23s08_irq_set_type() calls regmap_update_bits_base(), and the latter locks the mutex. However, __setup_irq() locks desc->lock spinlock before calling these functions. As a result, the system tries to lock the mutex whole holding the spinlock. It seems, the internal regmap locks are not needed in this driver at all. mcp->lock seems to protect the regmap from concurrent accesses already, except, probably, in mcp_pinconf_get/set. mcp23s08_irq_set_type() and mcp23s08_irq_mask/unmask() are called under chip_bus_lock(), which calls mcp23s08_irq_bus_lock(). The latter takes mcp->lock and enables regmap caching, so that the potentially slow I2C accesses are deferred until chip_bus_unlock(). The accesses to the regmap from mcp23s08_probe_one() do not need additional locking. In all remaining places where the regmap is accessed, except mcp_pinconf_get/set(), the driver already takes mcp->lock. This patch adds locking in mcp_pinconf_get/set() and disables internal locking in the regmap config. Among other things, it fixes the sleeping in atomic context described above. Fixes: 8f38910ba4f6 ("pinctrl: mcp23s08: switch to regmap caching") Cc: stable@vger.kernel.org Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com> Link: https://lore.kernel.org/20241209074659.1442898-1-e.shatokhin@yadro.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-17pinctrl: nomadik: Add check for clk_enable()Mingwei Zheng
Add check for the return value of clk_enable() to catch the potential error. Disable success clks in the error handling. Change return type of nmk_gpio_glitch_slpm_init casade. Fixes: 3a19805920f1 ("pinctrl: nomadik: move all Nomadik drivers to subdir") Signed-off-by: Mingwei Zheng <zmw12306@gmail.com> Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com> Link: https://lore.kernel.org/20241206221618.3453159-1-zmw12306@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-17pinctrl: ingenic: Replace seq_printf() by seq_puts()Geert Uytterhoeven
Simplify "seq_printf(p, "%s", ...)" to "seq_puts(p, ...)". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/9a5b38027ed674ca773fe28a3b3246631eae8834.1733404358.git.geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-17pinctrl: qcom: ipq5424: split spi0 pin groupManikanta Mylavarapu
The GPIO configuration differs for the spi0 clk, cs, miso, mosi pins. Therefore, split the spi0 pin group and assign function to each pin as per the specification. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/20241217091308.3253897-3-quic_mmanikan@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-16pinctrl: qcom: Add MSM8917 tlmm pinctrl driverOtto Pflüger
It is based on MSM8916 driver with the pinctrl definitions from Qualcomm's downstream MSM8917 driver. Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/20241215-msm8917-v9-3-bacaa26f3eef@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-02module: Convert symbol namespace to string literalPeter Zijlstra
Clean up the existing export namespace code along the same lines of commit 33def8498fdd ("treewide: Convert macro and uses of __section(foo) to __section("foo")") and for the same reason, it is not desired for the namespace argument to be a macro expansion itself. Scripted using git grep -l -e MODULE_IMPORT_NS -e EXPORT_SYMBOL_NS | while read file; do awk -i inplace ' /^#define EXPORT_SYMBOL_NS/ { gsub(/__stringify\(ns\)/, "ns"); print; next; } /^#define MODULE_IMPORT_NS/ { gsub(/__stringify\(ns\)/, "ns"); print; next; } /MODULE_IMPORT_NS/ { $0 = gensub(/MODULE_IMPORT_NS\(([^)]*)\)/, "MODULE_IMPORT_NS(\"\\1\")", "g"); } /EXPORT_SYMBOL_NS/ { if ($0 ~ /(EXPORT_SYMBOL_NS[^(]*)\(([^,]+),/) { if ($0 !~ /(EXPORT_SYMBOL_NS[^(]*)\(([^,]+), ([^)]+)\)/ && $0 !~ /(EXPORT_SYMBOL_NS[^(]*)\(\)/ && $0 !~ /^my/) { getline line; gsub(/[[:space:]]*\\$/, ""); gsub(/[[:space:]]/, "", line); $0 = $0 " " line; } $0 = gensub(/(EXPORT_SYMBOL_NS[^(]*)\(([^,]+), ([^)]+)\)/, "\\1(\\2, \"\\3\")", "g"); } } { print }' $file; done Requested-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://mail.google.com/mail/u/2/#inbox/FMfcgzQXKWgMmjdFwwdsfgxzKpVHWPlc Acked-by: Greg KH <gregkh@linuxfoundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-12-02pinctrl: samsung: update child reference drop commentJavier Carrasco
Commit 954445c72fc7 ("pinctrl: samsung: Drop redundant node parameter in samsung_banks_of_node_get()") modified the name of the function used to release child nodes from samsung_drop_banks_of_node() to samsung_banks_node_put(). Update the comment to use the current function name. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241106-samsung-pinctrl-put-v1-2-de854e26dd03@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-02pinctrl: samsung: fix fwnode refcount cleanup if platform_get_irq_optional() ↵Javier Carrasco
fails Commit 50ebd19e3585 ("pinctrl: samsung: drop pin banks references on error paths") fixed the pin bank references on the error paths of the probe function, but there is still an error path where this is not done. If samsung_pinctrl_get_soc_data() does not fail, the child references will have acquired, and they will need to be released in the error path of platform_get_irq_optional(), as it is done in the following error paths within the probe function. Replace the direct return in the error path with a goto instruction to the cleanup function. Cc: stable@vger.kernel.org Fixes: a382d568f144 ("pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241106-samsung-pinctrl-put-v1-1-de854e26dd03@gmail.com [krzysztof: change Fixes SHA to point to commit introducing the return leading to OF node leak] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-02pinctrl: samsung: Fix irq handling if an error occurs in ↵Christophe JAILLET
exynos_irq_demux_eint16_31() chained_irq_enter(() should be paired with a corresponding chained_irq_exit(). Here, if clk_enable() fails, a early return occurs and chained_irq_exit() is not called. Add a new label and a goto for fix it. Fixes: f9c744747973 ("pinctrl: samsung: support a bus clock") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/f148d823acfb3326a115bd49a0eed60f2345f909.1731844995.git.christophe.jaillet@wanadoo.fr Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-11-29Merge tag 'driver-core-6.13-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg KH: "Here is a small set of driver core changes for 6.13-rc1. Nothing major for this merge cycle, except for the two simple merge conflicts are here just to make life interesting. Included in here are: - sysfs core changes and preparations for more sysfs api cleanups that can come through all driver trees after -rc1 is out - fw_devlink fixes based on many reports and debugging sessions - list_for_each_reverse() removal, no one was using it! - last-minute seq_printf() format string bug found and fixed in many drivers all at once. - minor bugfixes and changes full details in the shortlog" * tag 'driver-core-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (35 commits) Fix a potential abuse of seq_printf() format string in drivers cpu: Remove spurious NULL in attribute_group definition s390/con3215: Remove spurious NULL in attribute_group definition perf: arm-ni: Remove spurious NULL in attribute_group definition driver core: Constify bin_attribute definitions sysfs: attribute_group: allow registration of const bin_attribute firmware_loader: Fix possible resource leak in fw_log_firmware_info() drivers: core: fw_devlink: Fix excess parameter description in docstring driver core: class: Correct WARN() message in APIs class_(for_each|find)_device() cacheinfo: Use of_property_present() for non-boolean properties cdx: Fix cdx_mmap_resource() after constifying attr in ->mmap() drivers: core: fw_devlink: Make the error message a bit more useful phy: tegra: xusb: Set fwnode for xusb port devices drm: display: Set fwnode for aux bus devices driver core: fw_devlink: Stop trying to optimize cycle detection logic driver core: Constify attribute arguments of binary attributes sysfs: bin_attribute: add const read/write callback variants sysfs: implement all BIN_ATTR_* macros in terms of __BIN_ATTR() sysfs: treewide: constify attribute callback of bin_attribute::llseek() sysfs: treewide: constify attribute callback of bin_attribute::mmap() ...
2024-11-25Merge tag 'pinctrl-v6.13-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time. New drivers: - Xlinix Versal pin control driver - Ocelot LAN969x pin control driver - T-Head TH1520 RISC-V SoC pin control driver - Qualcomm SM8750, IPQ5424, QCS8300, SAR2130P and QCS615 SoC pin control drivers - Qualcomm SM8750 LPASS (low power audio subsystem) pin control driver - Qualcomm PM8937 mixsig IC pin control support, GPIO and MPP (multi-purpose-pin) - Samsung Exynos8895 and Exynos9810 SoC pin control driver - SpacemiT K1 SoC pin control driver - Airhoa EN7581 IC pin control driver Improvements: - The Renesas subdriver now supports schmitt-trigger and open drain pin configurations if the hardware supports it - Support GPIOF and GPIOG banks in the Aspeed G6 SoC - Support the DSW community in the Intel Elkhartlake SoC" * tag 'pinctrl-v6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits) pinctrl: airoha: Use unsigned long for bit search pinctrl: k210: Undef K210_PC_DEFAULT pinctrl: qcom: spmi: fix debugfs drive strength pinctrl: qcom: Add sm8750 pinctrl driver dt-bindings: pinctrl: qcom: Add sm8750 pinctrl pinctrl: cy8c95x0: remove unneeded goto labels pinctrl: cy8c95x0: embed iterator to the for-loop pinctrl: cy8c95x0: Use temporary variable for struct device pinctrl: cy8c95x0: use flexible sleeping in reset function pinctrl: cy8c95x0: switch to using devm_regulator_get_enable() pinctrl: cy8c95x0: Use 2-argument strscpy() dt-bindings: pinctrl: sx150xq: allow gpio line naming pinctrl: single: add marvell,pxa1908-padconf compatible dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatible dt-bindings: pinctrl: correct typo of description for cv1800 pinctrl: qcom: spmi-mpp: Add PM8937 compatible dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8937 compatible pinctrl: qcom-pmic-gpio: add support for PM8937 dt-bindings: pinctrl: qcom,pmic-gpio: add PM8937 pinctrl: Use of_property_present() for non-boolean properties ...
2024-11-22Fix a potential abuse of seq_printf() format string in driversDavid Wang
Using device name as format string of seq_printf() is proned to "Format string attack", opens possibility for exploitation. Seq_puts() is safer and more efficient. Signed-off-by: David Wang <00107082@163.com> Reviewed-by: Kees Cook <kees@kernel.org> Link: https://lore.kernel.org/r/20241120053055.225195-1-00107082@163.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-18pinctrl: airoha: Use unsigned long for bit searchKees Cook
Instead of risking alignment problems and causing (false positive) array bound warnings when casting a u32 to (64-bit) unsigned long, just use a native unsigned long for doing bit searches. Avoids warning with GCC 15's -Warray-bounds -fdiagnostics-details: In file included from ../include/linux/bitmap.h:11, from ../include/linux/cpumask.h:12, from ../arch/x86/include/asm/paravirt.h:21, from ../arch/x86/include/asm/irqflags.h:80, from ../include/linux/irqflags.h:18, from ../include/linux/spinlock.h:59, from ../include/linux/irq.h:14, from ../include/linux/irqchip/chained_irq.h:10, from ../include/linux/gpio/driver.h:8, from ../drivers/pinctrl/mediatek/pinctrl-airoha.c:11: In function 'find_next_bit', inlined from 'airoha_irq_handler' at ../drivers/pinctrl/mediatek/pinctrl-airoha.c:2394:3: ../include/linux/find.h:65:23: error: array subscript 'long unsigned int[0]' is partly outside array bounds of 'u32[1]' {aka 'unsigned int[1]'} [-Werror=array-bounds=] 65 | val = *addr & GENMASK(size - 1, offset); | ^~~~~ ../drivers/pinctrl/mediatek/pinctrl-airoha.c: In function 'airoha_irq_handler': ../drivers/pinctrl/mediatek/pinctrl-airoha.c:2387:21: note: object 'status' of size 4 2387 | u32 status; | ^~~~~~ Signed-off-by: Kees Cook <kees@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20241117114534.work.292-kees@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-18pinctrl: k210: Undef K210_PC_DEFAULTzhang jiao
When the temporary macro K210_PC_DEFAULT is not needed anymore, use its name in the #undef statement instead of the incorrect "DEFAULT" name. Fixes: d4c34d09ab03 ("pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver") Signed-off-by: zhang jiao <zhangjiao2@cmss.chinamobile.com> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Link: https://lore.kernel.org/20241113071201.5440-1-zhangjiao2@cmss.chinamobile.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-18pinctrl: qcom: spmi: fix debugfs drive strengthJohan Hovold
Commit 723e8462a4fe ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping") fixed a long-standing issue in the Qualcomm SPMI PMIC gpio driver which had the 'low' and 'high' drive strength settings switched but failed to update the debugfs interface which still gets this wrong. Fix the debugfs code so that the exported values match the hardware settings. Note that this probably means that most devicetrees that try to describe the firmware settings got this wrong if the settings were derived from debugfs. Before the above mentioned commit the settings would have actually matched the firmware settings even if they were described incorrectly, but now they are inverted. Fixes: 723e8462a4fe ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping") Fixes: eadff3024472 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver") Cc: Anjelique Melendez <quic_amelende@quicinc.com> Cc: stable@vger.kernel.org # 3.19 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/20241025121622.1496-1-johan+linaro@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: qcom: Add sm8750 pinctrl driverMelody Olvera
Add TLMM pinctrl driver to support pin configuration with pinctrl framework for sm8750 SoC. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/20241112002843.2804490-3-quic_molvera@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: cy8c95x0: remove unneeded goto labelsAndy Shevchenko
In some cases the code uses goto labels to just return an error code. Replace those with direct return:s and drop unneeded goto labels. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/20241110210040.18918-7-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: cy8c95x0: embed iterator to the for-loopAndy Shevchenko
When we iterate through nports the iterator variable is effectively being not used outside of the loop. Make it clear by moving its definition into the for-loop. This makes code cleaner as well. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/20241110210040.18918-6-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: cy8c95x0: Use temporary variable for struct deviceAndy Shevchenko
Use a temporary variable for the struct device pointers to avoid dereferencing. This makes code a bit neater. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/20241110210040.18918-5-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: cy8c95x0: use flexible sleeping in reset functionAndy Shevchenko
The device reset assert and deassert length was created by usleep_range() but that does not ensure optimal handling of all the different values from device tree properties. By switching to the new flexible sleeping helper function, fsleep(), the correct delay function is called depending on delay length, e.g. udelay(), usleep_range() or msleep(). While at it, move out GPIO consumer name setting of the reset conditional, the all necessary checks are already done there, so logically that call is not related to the reset sequence. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/20241110210040.18918-4-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: cy8c95x0: switch to using devm_regulator_get_enable()Andy Shevchenko
The driver does not actively manage regulator state past probe() time, so we can use devm_regulator_get_enable() to simplify the code. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/20241110210040.18918-3-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-13pinctrl: cy8c95x0: Use 2-argument strscpy()Andy Shevchenko
Use 2-argument strscpy(), which is not only shorter but also provides an additional check that destination buffer is an array. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/20241110210040.18918-2-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08pinctrl: single: add marvell,pxa1908-padconf compatibleDuje Mihanović
Add the "marvell,pxa1908-padconf" compatible to allow migrating to a separate pinctrl driver later. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-3-e050609b8d6c@skole.hr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08pinctrl: qcom: spmi-mpp: Add PM8937 compatibleBarnabás Czémán
The PM8937 provides 4 MPPs. Add a compatible to support them. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/20241031-msm8917-v2-4-8a075faa89b1@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit (git 2.34.1) at 2025-03-19 23:44:05 +0000