linux-arm.git - Russell King's ARM Linux kernel tree

Age	Commit message (Expand)	Author
2022-12-26	soc: sifive: ccache: Add StarFive JH7110 support	Emil Renner Berthing
2022-11-09	soc: sifive: ccache: fix missing of_node_put() in sifive_ccache_init()	Yang Yingliang
2022-11-09	soc: sifive: ccache: fix missing free_irq() in error path in sifive_ccache_in...	Yang Yingliang
2022-11-09	soc: sifive: ccache: fix missing iounmap() in error path in sifive_ccache_init()	Yang Yingliang
2022-10-13	soc: sifive: ccache: define the macro for the register shifts	Zong Li
2022-10-13	soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes	Ben Dooks
2022-10-13	soc: sifive: ccache: reduce printing on init	Ben Dooks
2022-10-13	soc: sifive: ccache: determine the cache level from dts	Zong Li
2022-10-13	soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.	Greentime Hu
2021-01-07	RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740	Yash Shah
2020-05-28	soc: sifive: l2 cache: Mark l2_get_priv_group as static	Palmer Dabbelt
2020-05-28	soc: sifive: l2 cache: Eliminate an unsigned zero compare warning	Palmer Dabbelt
2020-05-20	riscv: Add support to determine no. of L2 cache way enabled	Yash Shah
2020-01-12	riscv: move sifive_l2_cache.h to include/soc	Yash Shah
2019-12-20	riscv: move sifive_l2_cache.c to drivers/soc	Christoph Hellwig