summaryrefslogtreecommitdiff
path: root/drivers/spi/spi-dw-core.c
AgeCommit message (Expand)Author
2023-08-07spi: dw: switch to use modern nameYang Yingliang
2023-07-11spi: Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SSAndy Shevchenko
2023-05-31spi: dw: Drop empty line from DebugFS init functionSerge Semin
2023-05-30spi-dw-core.c: Fix error checking for debugfs_create_dirOsama Muhammad
2023-05-15spi: dw: Round of n_bytes to power of 2Joy Chakraborty
2023-03-11spi: Replace all spi->chip_select and spi->cs_gpiod references with function ...Amit Kumar Mahapatra via Alsa-devel
2023-01-27spi: dw: Fix wrong FIFO level setting for long xfersSerge Semin
2022-08-23spi: dw: Quite logging on deferred controller registrationSerge Semin
2022-07-13spi: dw: Add support for master mode selection for DWC SSI controllerNandhini Srikandan
2022-06-27spi: dw: Add deferred DMA-channels setup supportSerge Semin
2021-12-23spi: dw: Propagate firmware nodeAndy Shevchenko
2021-11-16spi: dw: Replace DWC_HSSI capability with IP-core version checkerSerge Semin
2021-11-16spi: dw: Introduce Synopsys IP-core versions interfaceSerge Semin
2021-11-16spi: dw: Convert to using the Bitfield access macrosSerge Semin
2021-11-16spi: dw: Put the driver entities naming in orderSerge Semin
2021-11-16spi: dw: Discard redundant DW SSI Frame Formats enumerationSerge Semin
2021-11-16spi: dw: Add a symbols namespace for the core moduleSerge Semin
2020-12-09spi: dw: Add support for 32-bits max xfer sizeDamien Le Moal
2020-11-25spi: dw: Fix spi registration for controllers overriding CSLars Povlsen
2020-11-17spi: dw: Set transfer handler before unmasking the IRQsSerge Semin
2020-10-08spi: dw: Add poll-based SPI transfers supportSerge Semin
2020-10-08spi: dw: Introduce max mem-ops SPI bus frequency settingSerge Semin
2020-10-08spi: dw: Add memory operations supportSerge Semin
2020-10-08spi: dw: Add generic DW SSI status-check methodSerge Semin
2020-10-08spi: dw: Explicitly de-assert CS on SPI transfer completionSerge Semin
2020-10-08spi: dw: Discard chip enabling on DMA setup errorSerge Semin
2020-10-08spi: dw: Unmask IRQs after enabling the chipSerge Semin
2020-10-08spi: dw: Perform IRQ setup in a dedicated functionSerge Semin
2020-10-08spi: dw: Refactor IRQ-based SPI transfer procedureSerge Semin
2020-10-08spi: dw: Refactor data IO procedureSerge Semin
2020-10-08spi: dw: Add DW SPI controller config structureSerge Semin
2020-10-08spi: dw: Update Rx sample delay in the config functionSerge Semin
2020-10-08spi: dw: Simplify the SPI bus speed config procedureSerge Semin
2020-10-08spi: dw: Update SPI bus speed in a config functionSerge Semin
2020-10-08spi: dw: Detach SPI device specific CR0 config methodSerge Semin
2020-10-08spi: dw: Add DWC SSI capabilitySerge Semin
2020-10-08spi: dw: Use an explicit set_cs assignmentSerge Semin
2020-09-29spi: spi-dw: Remove extraneous lockingSerge Semin
2020-09-29spi: dw: Add KeemBay Master capabilitySerge Semin
2020-09-29spi: dw: Convert CS-override to DW SPI capabilitiesSerge Semin
2020-09-29spi: dw: Discard DW SSI chip type storagesSerge Semin
2020-09-29spi: dw: Disable all IRQs when controller is unusedSerge Semin
2020-09-29spi: dw: Initialize n_bytes before the memory barrierSerge Semin
2020-09-08spi: dw: Add support for RX sample delay registerLars Povlsen
2020-05-30Merge remote-tracking branch 'spi/for-5.8' into spi-nextMark Brown
2020-05-29spi: dw: Use regset32 DebugFS method to create regdump fileSerge Semin
2020-05-29spi: dw: Add core suffix to the DW APB SSI core source fileSerge Semin
generated by cgit (git 2.34.1) at 2024-06-20 18:16:26 +0000