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path: root/sound/soc/codecs/tlv320aic32x4-clk.c
AgeCommit message (Expand)Author
2023-08-14ASoC: tlv320aic32x4: Fix the divide by zeroGuiting Shen
2023-06-13ASoC: tlv320aic32x4: pll: Remove impossible condition in clk_aic32x4_pll_dete...Stephen Boyd
2023-06-08ASoC: tlv320aic32x4: div: Switch to determine_rateMaxime Ripard
2023-06-08ASoC: tlv320aic32x4: pll: Switch to determine_rateMaxime Ripard
2023-06-08ASoC: tlv320aic32x4: Add a determine_rate hookMaxime Ripard
2020-09-21ASoC: tlv320aic32x4: Ensure a minimum delay before clock stabilizationMiquel Raynal
2019-05-02ASoC: tlv320aic32x4: Fix potential uninitialized variableAnnaliese McDermond
2019-04-08ASoC: tlv320aic32x4: Fix spacingAnnaliese McDermond
2019-03-25ASoC: tlv320aic32x4: Model BDIV divider in CCFAnnaliese McDermond
2019-03-25ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCFAnnaliese McDermond
2019-03-25ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCFAnnaliese McDermond
2019-03-25ASoC: tlv320aic32x4: Model PLL in CCFAnnaliese McDermond
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