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AgeCommit message (Expand)Author
2024-02-16cxl/test: Add support for qos_class checkingDave Jiang
2024-01-22tools/testing/cxl: Disable "missing prototypes / declarations" warningsDan Williams
2023-12-22cxl: Add callback to parse the DSMAS subtables from CDATDave Jiang
2023-12-04cxl: Add cxl_num_decoders_committed() usage to cxl_testDave Jiang
2023-06-25Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams
2023-06-25Merge branch 'for-6.5/cxl-perf' into for-6.5/cxlDan Williams
2023-06-25Revert "cxl/port: Enable the HDM decoder capability for switch ports"Dan Williams
2023-06-25cxl/acpi: Probe RCRB later during RCH downstream port creationRobert Richter
2023-05-30cxl/pci: Find and register CXL PMU devicesJonathan Cameron
2023-05-18cxl/port: Enable the HDM decoder capability for switch portsDan Williams
2023-02-14Merge branch 'for-6.3/cxl-rr-emu' into cxl/nextDan Williams
2023-02-14cxl/port: Export cxl_dvsec_rr_decode() to cxl_portDave Jiang
2023-01-05tools/testing/cxl: Prevent cxl_test from confusing production modulesDan Williams
2023-01-04cxl/pci: Move tracepoint definitions to drivers/cxl/core/Dan Williams
2022-12-05Merge branch 'for-6.2/cxl-security' into for-6.2/cxlDan Williams
2022-12-03cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter
2022-11-30cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operationDave Jiang
2022-07-21cxl/region: Add region creation supportBen Widawsky
2022-05-19cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams
2022-05-19cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams
2022-05-19cxl/pci: Move cxl_await_media_ready() to the coreDan Williams
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams
2022-02-08cxl/core: Generalize dport enumeration in the coreDan Williams
2022-02-08cxl/pmem: Introduce a find_cxl_root() helperDan Williams
2022-02-08cxl/core/port: Rename bus.c to port.cDan Williams
2021-11-15cxl/test: Mock acpi_table_parse_cedt()Dan Williams
2021-09-21tools/testing/cxl: Introduce a mock memory device + driverDan Williams
2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams
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