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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424
maintainers:
- Bjorn Andersson <andersson@kernel.org>
description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on IPQ5332 and IPQ5424.
See also:
include/dt-bindings/clock/qcom,gcc-ipq5332.h
include/dt-bindings/clock/qcom,gcc-ipq5424.h
properties:
compatible:
enum:
- qcom,ipq5332-gcc
- qcom,ipq5424-gcc
clocks:
minItems: 5
items:
- description: Board XO clock source
- description: Sleep clock source
- description: PCIE 2lane PHY pipe clock source
- description: PCIE 2lane x1 PHY pipe clock source (For second lane)
- description: USB PCIE wrapper pipe clock source
- description: PCIE 2-lane PHY2 pipe clock source
- description: PCIE 2-lane PHY3 pipe clock source
'#power-domain-cells': false
'#interconnect-cells':
const: 1
required:
- compatible
- clocks
allOf:
- $ref: qcom,gcc.yaml#
- if:
properties:
compatible:
contains:
const: qcom,ipq5332-gcc
then:
properties:
clocks:
maxItems: 5
- if:
properties:
compatible:
contains:
const: qcom,ipq5424-gcc
then:
properties:
clocks:
minItems: 7
maxItems: 7
unevaluatedProperties: false
examples:
- |
clock-controller@1800000 {
compatible = "qcom,ipq5332-gcc";
reg = <0x01800000 0x80000>;
clocks = <&xo_board>,
<&sleep_clk>,
<&pcie_2lane_phy_pipe_clk>,
<&pcie_2lane_phy_pipe_clk_x1>,
<&usb_pcie_wrapper_pipe_clk>;
#clock-cells = <1>;
#reset-cells = <1>;
};
...
|
