blob: c84614663b5d50eb8d5855fc30fc571f0d19ed7b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom bcm2712 MSI-X Interrupt Peripheral support
maintainers:
- Stanimir Varbanov <svarbanov@suse.de>
description:
This interrupt controller is used to provide interrupt vectors to the
generic interrupt controller (GIC) on bcm2712. It will be used as
external MSI-X controller for PCIe root complex.
allOf:
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
compatible:
const: brcm,bcm2712-mip
reg:
items:
- description: Base register address
- description: PCIe message address
"#msi-cells":
const: 0
brcm,msi-offset:
$ref: /schemas/types.yaml#/definitions/uint32
description: Shift the allocated MSI's.
unevaluatedProperties: false
required:
- compatible
- reg
- msi-controller
- msi-ranges
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
axi {
#address-cells = <2>;
#size-cells = <2>;
msi-controller@1000130000 {
compatible = "brcm,bcm2712-mip";
reg = <0x10 0x00130000 0x00 0xc0>,
<0xff 0xfffff000 0x00 0x1000>;
msi-controller;
#msi-cells = <0>;
msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>;
};
};
|