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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/qcom,ebi2-peripheral-props.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Peripheral Properties for Qualcomm External Bus Interface 2 (EBI2)
maintainers:
- Bjorn Andersson <andersson@kernel.org>
properties:
# SLOW chip selects
qcom,xmem-recovery-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The time the memory continues to drive the data bus after OE
is de-asserted, in order to avoid contention on the data bus.
They are inserted when reading one CS and switching to another
CS or read followed by write on the same CS. Minimum value is
actually 1, so a value of 0 will still yield 1 recovery cycle.
minimum: 0
maximum: 15
qcom,xmem-write-hold-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The extra cycles inserted after every write minimum 1. The
data out is driven from the time WE is asserted until CS is
asserted. With a hold of 1 (value = 0), the CS stays active
for 1 extra cycle, etc.
minimum: 0
maximum: 15
qcom,xmem-write-delta-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The initial latency for write cycles inserted for the first
write to a page or burst memory.
minimum: 0
maximum: 255
qcom,xmem-read-delta-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The initial latency for read cycles inserted for the first
read to a page or burst memory.
minimum: 0
maximum: 255
qcom,xmem-write-wait-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The number of wait cycles for every write access.
minimum: 0
maximum: 15
qcom,xmem-read-wait-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The number of wait cycles for every read access.
minimum: 0
maximum: 15
# FAST chip selects
qcom,xmem-address-hold-enable:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
Holds the address for an extra cycle to meet hold time
requirements with ADV assertion, when set to 1.
enum: [ 0, 1 ]
qcom,xmem-adv-to-oe-recovery-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The number of cycles elapsed before an OE assertion, with
respect to the cycle where ADV (address valid) is asserted.
minimum: 0
maximum: 3
qcom,xmem-read-hold-cycles:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The length in cycles of the first segment of a read transfer.
For a single read transfer this will be the time from CS
assertion to OE assertion.
minimum: 0
maximum: 15
additionalProperties: true
|
